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Problem on dracula lvs layout extraction

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yann_sun

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Hi,all
How does dracual LVS extract channel width and length of MOS in layout?
I mean how the "W=** L=**" expression is obtained by dracula lvs run. This expression is locating on the right side(layout devices, nodes and parameters) of .lvs file? and, if i want to change the formula for calculating the value of W or L, even those of AS/AD/PS/PD for lpe, what should i do?
It is always easy for calibre lvs users to find the expression and revise.

Thanks in advance
 

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