Problem measuring output impedance of CMOS inverter using ngspice

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erikl said:
... generates a (nearly) full feedback amplifier, i.e. gain≈1 for low frequencies (LF), with corresponding low LF output impedance.
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FvM said:
Not in the frequency range of interest with 1F filter capacitor!
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Oh, overlooked, sorry! Cut-off frequency 0.16 fHz

@promach: change to 
Code VHDL - [expand]
1
2

CIN IN VSS 1p
Rf OUT IN 1E6
 

1F capacitor is just O.K. for simulation. It's bypassed in initial transient solution but cuts AC feedback even for high gain stages and mHz frquencies, in case they would be used.
 

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