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Problem finding out the Vout for PMOS and NMOS

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melryin

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I have problem to find out the Vout for the circuits on the attachment. Can anyone please teach me how to identify it? Your help is very much appreciated!!!
 

mujju433

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Can u please draw the diagram vertically and clearly so that i can understand ur quetion clearly

take care
 

A.Anand Srinivasan

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the output of the first circuit is 3.6V and that of the second circuit is 4.3V....
 

melryin

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A.Anand Srinivasan said:
the output of the first circuit is 3.6V and that of the second circuit is 4.3V....
thanks!! but I'm not very sure why the 1st one is not 3.3 since Vout = Vdd - Vtn?

Sorry, I'm a bit dumb on MOS, can you pls explain to me how you get the answer? So I can learn more from you!

Thank you so much for your help!!!:D
 

melryin

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rajanarender_suram said:
i think 1st one is 3.3V and second one is certainly 5V
i was thinking, the 1st one is Vout=Vdd-Vtn regardless of what is before that. and the second one, since Vg is less than Vd-Vtp, so Vout = Vin, am I right to think so???

Thank you so much guys!!!
 

rajanarender_suram

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for 1st one the out put is

Vout=vin for vg-vin>vth
vout =vg-vth for vg-vin<vth

this is what i know
 

A.Anand Srinivasan

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for the first one Vdd is made 4.3V by the FET before it and hence the output is 4.3-.7V = 3.6V.... second one it is Vdd-Vt=4.3V...
 

the_edge

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No no no, this is pass transistor logic...
For the first circuit Vout=4V, for the second Vout=5V...
 

melryin

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the_edge said:
No no no, this is pass transistor logic...
For the first circuit Vout=4V, for the second Vout=5V...
Can you pls explain a bit what is pass transistor? I saw some examples on the pass transistors which are similar to these. BUT i'm not clear what is pass transistor.

Thank you!
 

the_edge

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This is pass-transistor logic...

The idea is that both transistor are ON at the same time...
Your example is just with one transistor.
I will ask you to tell me where is drain and source of both transistor... I will not answer it till tomorow, so please think about it...
 

barath_87

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First one is certainly 3.3 V

the second one is a perfect example showing that a pmos is "strong one"

The o/p must be 5 v

Remember for both pmos and nmos Vt has a relationship with only Vgs for the device to be conducting ,since in the second circuit the capacitor is placed at the drain of pmos and the condition for pmos to be on Vsg≥|Vt| which is already satisfied the capacitor is charged to complete 5v.
 

melryin

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the_edge said:
This is pass-transistor logic...

The idea is that both transistor are ON at the same time...
Your example is just with one transistor.
I will ask you to tell me where is drain and source of both transistor... I will not answer it till tomorow, so please think about it...
Do you mean, telling you where is drain and source for the picture you have posted?

If so, I think point C is the source for both transistor. Am I right???
 

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