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Probing with oscilloscope causes current drop

john.zhang

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We are testing a fabricated chip with expected output current of around 4mA which is then used to charge a button cell. The input is from a PV cell. However, when we attach an oscilloscope probe onto one of the pin outs of the chip (i.e. the ring oscillator and the clock), we detect a significant current drop at the output, from 4mA to around 1mA. The current from the PV cell also drops.

what would be the cause of this current drop?

We tried with a different oscilloscope, and still detected a drop in current, albeit of a different value.

Attached is the block diagram of the DUT.

implemented in 65nm CMOS

note: the buffer is connected to the rectifier through offchip capacitors.

buffer.jpg
 

KlausST

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Hi,

We don´t see in the picture where you connect the scope.
Also we don´t see what frequencies and what node impedances we have to expect.

Thus it´s just guessing:
* the capacitance of the probe may have influence on the frequency and/or the signal voltage...

Klaus
 

asdf44

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Yep, I'd assume its the parasitics of the probe, probably C.

Put a 10pF cap on the same node and see if you get similar results.

10X mode on the probe should be better than 1X.
 

nitishn5

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As mentioned by others, the oscilloscope probe is loading your signal.

I would suggest either using a high impedance probe and perhaps a high frequency probe that has low capacitance.
But they would be costly.

Another approach is to use a separate voltage buffer with high input impedance and low input capacitance only for probing. That way you can isolate the signals from the oscilloscope probe.
 

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