Wenf.Yeh
Junior Member level 3

Hi guyes,
1. what should I do if I have found sth wrong in my design's hold time using PrimeTime and I want to fix it now(I don't want to fix it in the post-layout progress)? should I dump out some files in the PT, and let DC eat them to resynthesis the design?
2. if I found some thing wrong in the implementation design (gate-level) VS reference design(RTL) LEC,and I can figure out why my Implementation design goes wrong , what can I do to get my design successfully verified ? dump files? resynthesis design using DC? or can I change the netlist mannually?
Arthur
1. what should I do if I have found sth wrong in my design's hold time using PrimeTime and I want to fix it now(I don't want to fix it in the post-layout progress)? should I dump out some files in the PT, and let DC eat them to resynthesis the design?
2. if I found some thing wrong in the implementation design (gate-level) VS reference design(RTL) LEC,and I can figure out why my Implementation design goes wrong , what can I do to get my design successfully verified ? dump files? resynthesis design using DC? or can I change the netlist mannually?
Arthur