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PreCTS timing drv fixing

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kenambo

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Hi all,

While doing prects optimization I got some drv violations. So I prefered to fix those using "optDesign -preCTS drv" command. It fixed drv violations But I got some timing violations.
so again I did optDesign -preCTS -incr and I got timing violations fixed but drv violations came again.

So how to deal with drv violations as well as timing violations concurrently in Pre CTS stage.

Thanks.
 

Hi all,

While doing prects optimization I got some drv violations. So I prefered to fix those using "optDesign -preCTS drv" command. It fixed drv violations But I got some timing violations.
so again I did optDesign -preCTS -incr and I got timing violations fixed but drv violations came again.

So how to deal with drv violations as well as timing violations concurrently in Pre CTS stage.

Thanks.

do both at the same time instead of one after the other. see setOptMode command.
 

Hi
I have set the opt mode as setOptMode -fixDRC true and setOptMode -fixFanoutLoad true.... and did optDesign -preCTS -drv then optDesign -preCTS

Then I did optDesign -preCTS -incr The flow is as follows,

setOptMode -fixDRC
setOptMode -fixFanoutLoad true
optDesign -preCTS -drv
optDesign -preCTS
optDesign -preCTS -incr

By doing the above flow I got drv errors but timising is met.

Then I used this flow,
setOptMode -fixDRC
setOptMode -fixFanoutLoad true
optDesign -preCTS -drv
optDesign -preCTS
optDesign -preCTS

I didnt use -incr option then I can get timing met results as well as drv fixed results.

Maybe optDesign -preCTS honor both drv and timing and -incr option concentrates only on Timing.

The above is from my experience..I dont know it is correct or not..

Thanks.
 

Hi
I have set the opt mode as setOptMode -fixDRC true and setOptMode -fixFanoutLoad true.... and did optDesign -preCTS -drv then optDesign -preCTS

Then I did optDesign -preCTS -incr The flow is as follows,

setOptMode -fixDRC
setOptMode -fixFanoutLoad true
optDesign -preCTS -drv
optDesign -preCTS
optDesign -preCTS -incr

By doing the above flow I got drv errors but timising is met.

Then I used this flow,
setOptMode -fixDRC
setOptMode -fixFanoutLoad true
optDesign -preCTS -drv
optDesign -preCTS
optDesign -preCTS

I didnt use -incr option then I can get timing met results as well as drv fixed results.

Maybe optDesign -preCTS honor both drv and timing and -incr option concentrates only on Timing.

The above is from my experience..I dont know it is correct or not..

Thanks.

you are running into a small issue of convergence. basically you got lucky when running optDesign for the second time there. what DRV violation type is getting you in trouble? is it max_tran?
 

Hi,

Actually I was getting max_tran as well as max_fanout violations. Is that a correct flow to use optDesign second time? is it advisable or not?
thanks.
 

ok. maybe you should try place_opt_design instead of placeDesign followed by optDesign -preCTS

or you could try to make your max_tran constraints tighter from the start, even from synthesis. this should help.
 

Hi all,

While doing prects optimization I got some drv violations. So I prefered to fix those using "optDesign -preCTS drv" command. It fixed drv violations But I got some timing violations.
so again I did optDesign -preCTS -incr and I got timing violations fixed but drv violations came again.

So how to deal with drv violations as well as timing violations concurrently in Pre CTS stage.

Thanks.

I think you should try to fix it from synthesis step
 

yeah thanks Try to fix it in synthesis stage itself..

And Now, after the successful preCTS I just moved to CTS stage ... and I created clock tree specification file using "createClockTreeSpec" and then I used "ckSynthesis" . The tool tells that, Clock net is not syntesized by FE-CTS so synthesis not succeeded.

Then I tried "clockDesign" , and it worked.
So what is the difference between "ckSynthesis" and "clockDesign".

Thanks.
 

yeah thanks Try to fix it in synthesis stage itself..

And Now, after the successful preCTS I just moved to CTS stage ... and I created clock tree specification file using "createClockTreeSpec" and then I used "ckSynthesis" . The tool tells that, Clock net is not syntesized by FE-CTS so synthesis not succeeded.

Then I tried "clockDesign" , and it worked.
So what is the difference between "ckSynthesis" and "clockDesign".

Thanks.

Have you run "specifyClockTree" before running ckSynthesis. clockDesign will automatically create and load a clock spec file if it is not loaded.
 

Have you run "specifyClockTree" before running ckSynthesis. clockDesign will automatically create and load a clock spec file if it is not loaded.

there are multiple flows for CTS being supported by Encounter/Innovus. You have to pick one and use the commands that pertain to that flow.
 

"optDesign" command will call the following five optimizers in multiple iterations:

Global Optimizer
Area Reclaim
DRV Optimizer
TNS Optimizer
WNS Optimizer

while "optDesign -incr" command only calls the WNS Optimizer (and maybe Area Reclaim).

For EDI 14.2 and Innovus, clockDesign will call "ccopt -cts" command with auto clock tree spec extraction, while ckSynthesis always calls the legacy engine.
 

"optDesign" command will call the following five optimizers in multiple iterations:

Global Optimizer
Area Reclaim
DRV Optimizer
TNS Optimizer
WNS Optimizer

while "optDesign -incr" command only calls the WNS Optimizer (and maybe Area Reclaim).

For EDI 14.2 and Innovus, clockDesign will call "ccopt -cts" command with auto clock tree spec extraction, while ckSynthesis always calls the legacy engine.

So you are saying optDesign -incr only calls some particular engine .. Am i right?

IF so, What is the use of -incr option here?

thanks.
 

So you are saying optDesign -incr only calls some particular engine .. Am i right?

IF so, What is the use of -incr option here?

thanks.

essentially optDesign will give up quicker than optDesign -incr when it find paths that are not meeting setup time. that is the #1 difference in my opinion.
there are others too. if you have MMMC with many many corners, optDesign and optDesign -incr can decide to work on a different subset of them and that will generate very different outcomes.
 

essentially optDesign will give up quicker than optDesign -incr when it find paths that are not meeting setup time. that is the #1 difference in my opinion.
there are others too. if you have MMMC with many many corners, optDesign and optDesign -incr can decide to work on a different subset of them and that will generate very different outcomes.
Only the WNS Optimizer has the "give up" mechanism:

When the WNS Optimizer cannot find further improvements for WNS, it quits & triggers refinePlace. If TNS gets worse after refinePlace, the WNS Optimizer will be restarted again for another iteration, that is, the tool does not "give up".

Both optDesign & optDesign -incr call WNS Optimizer in this way. You will find the tool "hard to give up" in case either TNS or local density is high(due to the randomness @refinePlace).
 

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