PowerPAD Thermally Enhanced Package

[Veronika]

I am using PowerPAD at the first time (for TPS51200 voltage regulator). Am I right that the Solder Mask should not be present over the area of the exposed thermal pad of IC?
One more thing, PowerPAD vias should be added to the footprint itself or during the routing the design?
If you have same picture to represent the correct footprint of IC it would be helpful!
Thank you in advance!

 

[FvM]

Am I right that the Solder Mask should not be present over the area of the exposed thermal pad of IC?

Yes, the pad is supposed to be soldered.

One more thing, PowerPAD vias should be added to the footprint itself or during the routing the design

Preferably in the footprint. There are different recommendations for the design of the "thermal" vias. In most cases, small open vias (<= 0.3 mm) are acceptable. They will however drain part of the solder. Some assembly houses suggest plugged thermal vias, particularly for QFN like packages.