Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

PowerOnReset debouncing the assertion and the deassertion

Status
Not open for further replies.
buenos

buenos

Advanced Member level 3
Joined
Oct 24, 2005
Messages
960
Helped
40
Reputation
82
Reaction score
24
Trophy points
1,298
Location
Florida, USA
Activity points
9,116
PowerOnReset debouncing

hi

i have an RC powerOn Reset circuit resetting some logic in my FPGA, but it has some glitches.

is there a way to debounce both the assertion and the deassertion?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top