Power supply over voltage or slow ramp up? And will an inductor help?

[TQFP]

Hello,

I have a circuit board that plugs into an existing computer system so the input is 5VDC (4.8 to 5.25 is about the range). My board carries an FPGA and I need 1.2VDC, 2.5VDC, and 3.3VDC. I have two LDOs (MCP1801 and MIC5320) that provide the required voltages to the FPGA, each with a 1uf input and output ceramic cap (XR7) as per the "typical application" examples in the datasheets.

To date I have not had any problems with my design until tonight. I was testing my board in a system (these are all old computers) and the FPGA would not configure. I have the "configuration done" signal from the FPGA wired to an LED so I know when it is up and running. In this particular system the LED stayed off. That really surprised me because to get the FPGA to configure only requires 5V input (to the board) and ground. I could (and have) plug my board into a battery and at least get it to configure. Checking the host system voltages indicated a 5.07VDC which is easily within range.

After pulling my hair out for hours, I finally put my circuit board on a breadboard, ran one wire to ground and another to the host system's 5VDC. It still did not work, but at least this test isolated the problem to power and not some strange issue with the I/O pins.

Then, for some reason, I put a 10-ohm resistor inline with the input, powered on, and it worked! Now I was confused because the max input of the LDOs are 10V and 6V, so 5.07V should not be causing a problem (and never caused a problem in any of the 20 or more systems I have used in the past).

Next I pulled the 5VDC wire from the breadboard, powered on the system, then plugged the 5VDC wire back into the breadboard (without the 10-ohm resistor), and the FPGA configured correctly again!

Finally (and I only did this once because I really don't want to blow anything up) I put my board back in the system (i.e. via a 40-pin socket) powered on, then *quickly* powered off/on (click click click). That worked after 2 or 3 off/on tries.

So how can I fix this? It seems to me that the host system's power supply is either coming up too slow for the FPGA and it gets stuck during initial configuration, or the host power supply is over-shooting the 5VDC at power-on. I don't know which it is though, and I can't come up with a way to capture the first few milliseconds of the power-on period. I have a decent multimeter and an o-scope, but that's about it.

But even with the small 10-ohm inline resistor, the input to my board was reduced to about 3.2 volts (I'm not sure how the 3.3V LDO was even working at that point, but it was). I was thinking maybe an inductor would help limit the input without the voltage loss, but I could not find any examples on the 'Net where anyone was using an inductor with a small LDO.

Any insight, theories, or suggestions would be greatly appreciated.

Thanks,
Matthew

 

[rohitkhanna]

Hi TQFP. First off, I must commend you on a very well put together question. The debugging experiments well explained, the thought process well put together.

My experience with FPGA's is zero, but experience with most other electronics is considerable. Also, the wonders achieved with Google are the greatest.

I noticed you mentioned "old computers" - maybe implying linear supplies, and I read a bit about that in this app note
https://www.ti.com/lit/an/slyt079/slyt079.pdf

In any case, have a look at the app note - it will probably give you the insights you need.

cheers!

 

[BradtheRad]

1.

Connecting a coil is risky. It can generate a high voltage kick if current is reduced by inserting a high impedance, such as when power is disconnected either by you or internal circuitry.

2.

Are there large capacitors on your board? Do they charge up in the first moments of power on? That could pull down supply V at a crucial time.

3.

Is there a lot of ripple at the supply rails when your board powers up? That could prevent proper initialization even if the ripple subsides quickly.

4.

Does your oscilloscope have a vertical threshold setting, so it will begin a trace just as the input crosses that threshold? That is a way to capture the first moments of power-on.

Or, try leaving it on free run. The trace should linger onscreen so you can see what happened at power-on.

 

[TQFP]

Hi TQFP. First off, I must commend you on a very well put together question. The debugging experiments well explained, the thought process well put together.

Thanks. I was trying to keep it as short as possible and not pull in unnecessary details. I was worried it was getting too long.

I noticed you mentioned "old computers" - maybe implying linear supplies,

Classic home computers from the early to mid 80's mostly. They are old, but I'm always surprised at how much what we consider "modern technology" they have in them (SMD parts, 8/8mil trace/space, etc). Most of the systems have switching supplies, but some are linear. In this particular case the supply is a switcher.

and I read a bit about that in this app note
https://www.ti.com/lit/an/slyt079/slyt079.pdf

In any case, have a look at the app note - it will probably give you the insights you need.

cheers!

Ah yes, very nice, thanks! Google is great, but you still have to get the search right. I was off looking for power supply info, LDO with inductors, etc. and didn't think about FPGA power up sequencing. The only crappy part at this point is, I have a pile of 250 boards in front of me and a design change now would !@#$. I hate learning the hard way...

Matthew

---------- Post added at 09:49 ---------- Previous post was at 09:38 ----------

1.

Connecting a coil is risky. It can generate a high voltage kick if current is reduced by inserting a high impedance, such as when power is disconnected either by you or internal circuitry.

Good to know! I think an inductor is not going to be a silver bullet for me anyway.

2.

Are there large capacitors on your board? Do they charge up in the first moments of power on? That could pull down supply V at a crucial time.

Only what is required according to the LDO datasheets. Each LDO has one 1uf ceramic on the input, and each output also has one 1uf ceramic (5 total in the regulator section). Each IC has at least one 0.1uf ceramic, and the FPGA has eight 0.1uf ceramics on it, again according to the FPGA (Spartan 3E) datasheet. No electrolytic caps on my board, and nothing over 1uf.

3.

Is there a lot of ripple at the supply rails when your board powers up? That could prevent proper initialization even if the ripple subsides quickly.

I'm not sure, but the 5VDC supply is from the host system, and by the time the voltage gets to the socket of an IC I assume it is as clean as it is going to get. The system power supply is a switcher, and I'm not sure how to capture the power on events without something like a storage scope.

4.

Does your oscilloscope have a vertical threshold setting, so it will begin a trace just as the input crosses that threshold? That is a way to capture the first moments of power-on.

Or, try leaving it on free run. The trace should linger onscreen so you can see what happened at power-on.

It probably does (Tek2465B), and it certainly has more features than I have ever needed so far. I'll use your suggestions and see if I can figure something out.