Pulsed power handling is tricky and I'd say you
want to do some test-to-fail and determine how
much safety margin there may be.
There are some resistor familes which bother to
rate pulsed power and many that do not.
Thin and thick film resistors will both have a
power-to-blow curve. There may be a lesser
stress power-to-drift as well, although a finite
drift may be tolerable if it has an acceptable
asymptote (thermal "annealing" of material
would reach a steady state; thermal entrainment
of resistor film into passivation could go on until
fail-open).
I'd worst-case pulse width and peak current by
at least 20% apiece and see what you see. I'd
bring the rep rate up from "couple daily" to maybe
10ms period, figuring <1% is probably close enough
to sparse for the experiment. Then 2X daily * 20 yrs
is 14600 cycles which would get done in 146 seconds.
You could try that and, if it doesn't blow up or hit a
spec temp limit, let it run over the weekend for more
confidence.
Now in this graph (from real bench data, on an IC
thin film resistor) 35uS is looking like it's pretty much
on the asymptote (non-adiabatic) and only 1W/mil2
pulsed power density.
Now if I took an 0804 resistor to have maybe 7x3mm
of resistor film area, and did the arithmetic:
3000um*7000um/(mil/25.4um)**2*1W/mil2
= 32550 W
So you've got maybe a factor of 20 to soak up any
material, size, repetitions & rate, or general
physics-of-failure related discrepancies. Not a
bad position to be in, I guess.
But I'd still be testing (I did this testing for the results
shown about 25 years ago because I needed to
know and nobody could tell me).