Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Power planes in Multilayer PCB

Status
Not open for further replies.

www111

Junior Member level 3
Joined
Oct 10, 2012
Messages
29
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,541
HI all,

I'm designing a multilayer PCB (12 layer ) and I decided to use layer 5 and 6 for power distribution.

So the question is can I put one voltage(eg. 1V) on one plane(eg. L5) and then a second voltage(eg. 3.3V) on other plane(eg. L6) on top of it? OR i have to have GND plane In-between?

Layer L4 and L7 are GND planes.

Will be there some coupling between these voltages?

note: I have 12 different voltages to rout on these two layers so there will be multiple overlaps of different voltages.

Best Regards,
David.
 

Hi,

coupling is only with AC voltages.
Because supply voltages are considered to be DC i don´t see the need for a GND plane inbetween.
Especially here, when L4 and L7 are GND.

+++

But you speak of 12 different voltages... this makes me think you really want to route the supplies as "wires" and not as "planes". Please clarify.


Klaus
 
Hi,

coupling is only with AC voltages.
Because supply voltages are considered to be DC i don´t see the need for a GND plane inbetween.
Especially here, when L4 and L7 are GND.

+++

But you speak of 12 different voltages... this makes me think you really want to route the supplies as "wires" and not as "planes". Please clarify.


Klaus

Hi,

Some of them will be wires but some will be planes or to say wide wires.

I will use a wire if I have to connect one output of LDO to one pin on uP and use plane if i have to connect SW power supply (VNN) to multiple core pins on uP.

I have a PMIC and an microprocessor and there are lot of different voltage rails like:
V1P2A, V1P24S, V1P8A, V1P8S, V3P3A, V3P3S, VCC, VNN, VDD, 5V, V1P0A, V1P0S, V1P35S and so on :)
So at some point the 5V(L5) and V1P8A(L6) will cross (if wire) or be on top of each other(if plane), so I'm was not shore if I can do this?

David.
 

Hi,

be sure to place 10n ... 100nF X7R ceramic Cs near the supply pins... to a really_solid_GND-plane.

If wires, then be aware, that the wire is inductive, forming a LC resonant with the capacitor. A simple RC damping (100R, 100n) somewhere in the wire lowers Q and thus avoids ringing...to be on the very safe side.


Klaus
 

An interesting dilemma, that said many boards are done this way and work perfectly, when I do 8 layer boards engineers ask for this stack up as it maximises the benefits of GND planes, the signals on L2, L7 have adjacent grounds, the two middle power planes also have adjacent GND planes for some planar capacitance.
The only caveat is while the planes are sort of DC, there will be switching noise present and this can capacitivly couple between the planes. For this reason (EMC) minimise the size of the planes, do not enlarge them to fill empty areas, use Ground pours instead to balance the copper and have the planes only cover the area of pins they need to, this will minimise capacitive coupling and reduce the chance of planar resonances especially if you make the copper pours irregular shapes.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top