kgeorge123
Member level 1
vsdg cadence
Hi,
Does any one know if we can estimate the power(say in terms of current consumption) of the chip at the stage of PnR. Or at the latest stage which ever is possible. I wish to calculate Reset current (which would mean the leakage current of the chip) and say the current when it is running at 100MHz.
Hi,
Does any one know if we can estimate the power(say in terms of current consumption) of the chip at the stage of PnR. Or at the latest stage which ever is possible. I wish to calculate Reset current (which would mean the leakage current of the chip) and say the current when it is running at 100MHz.