Power aware verification using CPF and Industry practice

[nram2901]

Hi Board,
I am working on Power aware verification of my design using CPF. We have 2 power domains, an always on domain and a switchable power domain. The switchable power domain has 2 instances.

I was able to verify the design using CPF file. I was able to see the isolation rule getting applied and then the simulation passed with proper iso values when powered down.

My questions are,
1. Right now i am running handful of testcase using CPF file. I am running only testcase which does power down of the 2 instances in switchable power domain. Is it a good practice to run all the testcases with the CPF file?
2. Will the simulation performance degrade by running simulation with CPF files?
3. Will it be advantages to do so? Will i catch enough bugs when i have many testcase running when both the domains are Powered ON?
4. What is the industry practice on running simulation using CPF or UPF?

I would request someone to help me in finding answer to above questions.

Thanks,
Ram

 

[dave_59]

See http://blogs.mentor.com/verificationhorizons/blog/2013/03/14/ieee-approves-new-low-power-standard/

 

[artmalik]

This is flow enablement question. Most of the standard cells have isolation cells, clamp cells, voltage level shifters to take of these situations. They are fully supported by the Design Compiler, Primetime tools.
a) All the CPF files does is to provide the information to the tools to where to put the clamp cells or isolation cells etc. Also makes sure that you dont leave pin in the design floating or in high impedance state.
You dont have worry about the simulation time runs, they will increase but no enough to be a problem. it is always good to catch problems before hand so if the power aware simulations with CPF models can solve the problem the better it is.
BOTH CPF and UPF files are used in industry. We have been using them for sometime.