Potential shifts in transient simulation

[Winny_Puuh]

Hey, I'm having a totally odd problem:
If you take a look at the picture, you can see how the drain-source potential of my tail current source transistor rises. My AC input signal has an amplitude of 10 mV (if I go even higher, the potential rises even more). I don't have a clue what could cause that. Is there anyone who's ever seen such a thing? I've also uploaded the schematic (I look at the transient signal at the node which is marked in red)
Hope someone can help me... If anymore information is needed, just tell me pls...

Winny

 

[dick_freebird]

A modest amount of rectification (charge pumping) could
put your transient steady state off from DC. One thing to
try, diagnostically, is to run the same simulation with that
source having zero amplitude.

Transient and DC solution criteria and methods also differ;
for example DC may have gmin overlaid which can make
some critical high impedance node have less gain, etc.
but then that's gone once tran starts, etc. Looking at
a zero-AC-stimulus (quasi DC) run will give you an idea
of just how valid your initial condition is, absent the
charge pumping effects and so on.

 

[crutschow]

It would appear that there are some time-constants in the bias point that are still settling. Let the simulator calculate the initial bias point before the transient simulation starts (don't use UIC), or extend the time of the simulation until the voltage settles.

 

[Winny_Puuh]

I've looked at the simulation for 100s now and yes, the voltages settle. unfortunately, all my transistors seem to be turned off after that time. I dont know why but my output signal still seems to be totally alright... i assume i cannot just ignore the problem, can i? I also put my AC amplitude to 0 V but the simultions results are then very very odd... fully of random spikes... I'm not very experienced with analog design... ><