PMOS WELL of same bulk potential of different transistor groups

[Junus2012]

Dear friends,

I have different PMOS matched transistors matched in different groups but all they have the same bulk potential (bulk connected to the VDD), if these groups are near to each other is it better to attache both of the well and makes the groups share the same well as much as possible? or may separate wells give better performance ?

Thank you very much

 

[rangermad]

Only the design engineer can give an adequate answer to your question.

 

[sutapanaki]

It is customary to place matched PMOS transistors in the same well. And I mean physically the same well, not just electrically connected to the same potential.

 

[ljp2706]

If you put devices in the same well that share a common potential, it’ll reduce layout area. Otherwise you’ll have to ensure you have adequate spacing between the wells to pass DRC. This is especially important when the wells are biased at different potentials. With increasing reverse bias on the wells, their depletion widths expand. If the depletion widths get too close, they can conduct a lot of leakage current or even result in a punchthrough scenario.

 

[Junus2012]

Dear friends,

Thank you for your reply,

I understand from your kind explanation that there is no difference in electrical proparties if I put them in the same or different well, I am talking about matched transistors with the same bulk potantial, it is only matter for saving the distance between two different well... and also as Suta said, it is becoming like a custom to put them in the sme well

 

[sutapanaki]

If they really have to match. place them in the same well.