pls give advice for "NEW SOC CHIP DEVELOPMENT FLOW&quot

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NEW SOC CHIP DEVELOPMENT FLOW
1.1 WHAT PRODUCTION
ACTIVITY:
Market information collection.
market analysis
People involved:
Market department(include customer support group)
Manager.
customer
1.2 Production function define include planning
Activity:
information collection.
Customer need collection
Production function define
Schedule planning(sample and true production)
budgeting
People involved:
Market(include customer support group)
customer
Finance
Manager
R&D
1.3 Detail spec define
Activity:
Detail production Spec define
Architecture development
Hardware/software interface define
People involved
R&D(Architecture,software,RTL,test,P&R,firmware…,all R&D engineer)
Manager
1.4 work assign and schedule define
Activity:
Assign work to R&D
Schedule define for everyone
People involved
Manager
R&D
1.5 production development
1.5.1 System design &verification(start at architecture development)
Activity:
System model development
System verification
Spec or architecture Modify
Firmware development
People:
Architecture engineer
Verification engineer
Software engineer
RTL engineer
Firware engineer
1.5.2 RTL development
Activity:
RTL coding
Verification of each module
People:
Frontend design engineer
DFT engineer
1.5.3 Design verification
Activity:
RTL verificaiton
RTL modify
FPGA verification
People:
Design verification engineer
RTL engineer
FPGA engineer
1.5.4 Physical implementation
Activity:
Syntheis
Floorplan
P&R
STA
Wafer testvector generation
Verification
People:
P&R engineer
DFT engineer
Verificaiton engieer
RTL engineer
1.5.5 Sample debug & test
Activity:
sample board development
reference design
debug and test
people:
software engineer
PCB engineer
Verification engineer
Firmware
RTL engineer
1.5.6 Wafer test
Activity:
Wafer test
People:
Test engineer
DFT engineer

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Please give me advice about the SOC chip development flow.
Which step i lost
thanks.