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pls explain this circuit

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Junior Member level 3
Jun 2, 2005
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by pass capicator in common emitter configuration

please explain me what each and every component in this circuit serves for

this is a self biased CE amplifier circuit. u can see the complete explanation in basic electronics by malvino or milman and halkias

this is a fixed bias common emitter configuration amplifier. the resistors are used to bias the transistor to its mode of operation. capacitors C1 and C3 are used for isolating the DC bias of one stage to another. C2 is usd to bypass the resistor R3 during AC analysis. to make the gain of the amplifier larger.


It's a based BJT amplifier,which R1&R2 provide the bias voltage to ensure the input without any distortion,and the gain is about beta+1,beta is the npn transistor's parameter.

i'll try to help you :) please correct me if there are any error.. :)

it's a common emitter configuration, it use to amplify the input signal, the transistor have two functions, for amplifying and for switching, the configuration of the transistor here is called common emitter and use to amplify the input signal.

to amplify the signal, we need to find the quiescence of its operation from its load line, so that we need to bias the transistor, from the configuration, it's voltage divider bias (R1 and R2 is voltage divider), C1 and C3 is coupling capacitor to couple the signal, C1 for coupling the input signal to the bjt to be amplified, and C3 coupling the amplified signal to the load. C2 work as by pass capacitor to by pass the ac signal to the ground from emitter, so that it's called common emitter, the capacitor pass the ac signal and block the dc signal, Rc and Re use to determine the Quiescence at load line, there is a parameter called r'e, r'e = 25mV/Ie, it's resistance toward ac signal inside the bjt, r'e depend on temperature, the amplified signal gain is limited by the Vcc.

we can find the quiescence by find the icq and vceq at ac load line, so the output signal wouldn't have any distortion. for find the icq and vceq at ac load line, we would need analyse it at dc analysis, and then ac analysis. when we determine of the quiescence at load line, it's like we determine the resistance between collector and emitter

to determine the low cut off frequency we need to concern at C1,C2, and C3, for the high cut off frequency we need to concern at the internal capacitance of the transistor..

the input impedance of the common emitter configuration is lower if compare to class B or AB or common collector amplifier, and the output impedance is also too high, but the voltage gain of the common collector is high, so it always used at the first stage of amplifier as driver, and it need a buffer stage then..

hope the explanation can help you :)

the ckt is a self biased ce amplifier circuit. any electronics book can help you about this circuit

zhi_yi said:
... but the voltage gain of the common collector is high, so it always used...

the voltage gain of the common collector configuration is always less than 1
... mistyped?


yes, mistyped, thank you very much for corrected me :)

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