kurtulmehtap
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Hi All,
I have designed a PLL with a 10 MHz Reference and a 2.2-2.6 GHz VCO (using discrete PFD and Frequency divider). I wonder if can improve the phase noise/spurious by placing a 10 MHz Crystal filter in front of the feedback loop. For a divider value of 220 we get 2200 Mhz /200 =10 Mhz and then applying a 10 Mhz filter.
Any Ideas if this will work?
Thank you
I have designed a PLL with a 10 MHz Reference and a 2.2-2.6 GHz VCO (using discrete PFD and Frequency divider). I wonder if can improve the phase noise/spurious by placing a 10 MHz Crystal filter in front of the feedback loop. For a divider value of 220 we get 2200 Mhz /200 =10 Mhz and then applying a 10 Mhz filter.
Any Ideas if this will work?
Thank you