PLL Loop filter components

[dhasmana]

Hi,

When we know the loop bandwidth (depending upon the reference frequency) then how do we decide on how much R and how much C we should put?Means how do we divide the desired RC for R and C?

On what factors, the accumulated jitter of a PLL depend?What is the typical value of accumulated jitter for a PLL with output freq ~ 100MHz in say 130nm technology?

How is static phase error translated into jitter?Please comment.

Regards,
Jitendra.

 

[Yanhui]

To ur 1st question. This paper will helpful if u just do a chargepump PLL design.

 

[Yanhui]

Hi,

When we know the loop bandwidth (depending upon the reference frequency) then how do we decide on how much R and how much C we should put?Means how do we divide the desired RC for R and C?

On what factors, the accumulated jitter of a PLL depend?What is the typical value of accumulated jitter for a PLL with output freq ~ 100MHz in say 130nm technology?

How is static phase error translated into jitter?Please comment.

Regards,
Jitendra.

jitter is discribe of freq-domain phase noise at time domain.
they have different units.