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PLL input Frequency in Divider Mode with Variable Input

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imbichie

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Hi Friends,

Now i am using a PLL which is in Divider Mode with variable input frequency. For clearly : a PLL which multiply the input (Which is variable) frequency in a pre-defined ratio. in my case my PLL multiply the input frequency with a factor 4, so whatever be the input frequency, i will get a multiple of 4.

Now the problem is that, during the configuration of the PLL i shoulb able to give the input frequency, which should be Maximum or Minimum of the input frequency. in my case the max input frequency is 27 and the min is 6.

so during the configuration which frequency i shall given?? means 6 or 27 ??

then Why??

(i am working with Lattice FPGA)
 

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