PLL divider, input is analog or digital??

[knack]

digital counters in pll

Hi,

In my study to PLL, i face a wierd thing! All proposed designs we study for loop divider are mainly digital counters although the signal coming from the VCO side is sine wave!!
How comes? Can a digital divider divide CORRECTLY this sinusoidal signal??

Please help me to remove this mistry!!

Regards,
--Knack

 

[servicemann]

cml divider square wave input

It would be difficult divide sinusoidal signal. That is why it is shaped into rectangular form and digital divider is used!

 

[MSSN]

What is the output frequency of the VCO and what is the dividing ratio of the divider?

 

[knack]

What is the output frequency of the VCO and what is the dividing ratio of the divider?

Output frequency of VCO is from 2400 to 2483.5 MHz...

Dividing ratio (total N output from the Pulse-Swallow counter) is between 480 to 500 .. i don't speak now about how should the internal counters will be.. Definitely they will have lower ratio.

It would be difficult divide sinusoidal signal. That is why it is shaped into rectangular form and digital divider is used!

How can it be shaped at RF high frequencies??

Still wierd!

Regards,
-- Knack

 

[malaya.nath]

hi friend ,

Here I am attaching a pdf files which clear your dout.

Thank you,

malaya@iitg.ernet.in

 

[knack]

hi friend ,

Here I am attaching a pdf files which clear your dout.

Thank you,

malaya(at)iitg.ernet.in

Hi

Attached file doesn't work!!!
Kindly check that you sent it correctly, or send agian,

Thanks,
--Knack

 

[bageduke]

What I did is to re-shape sine wave to square wave using differential comparator. If your comparator cannot handle high frequency, try to use CML divider to slow the VCO output down, then pass comparator, and then pass your digital divider.

 

[hung_wai_ming@hotmail.com]

Don't worry, as long as your VCO output can cut across the digital gate threshold point, you can get true digital signal.
Think of an Op-Amp with analog output but still needs to convert to digital finally. How, just go thru a buffer is enough.
Some ppl if you use diff VCO, will go thru a D2S to make it single ended and then pass thru logic gates

 

[yukman]

thanks for sharing

 

[ahmad_abdulghany]

I can upload for you any IEEE papers talking about that.. Just give links