PLL and VCO specifications

[savithru]

common vco specs

I have decided to use Ring VCO for my PLL and I am using the differential architecture.I want to vary the delay by varying the load. Give proper guidance how I can decide the W/L ratio of each of my transistors.


Also can u pls send the specifications for my PLL Since I am designing my PLL as part of my M.tech initiallly I was decided to design my PLL for some orbitory specs. NOw I want the better specs. If you are designing the PLL pls , kindly send the specifications.

Also kindly tell me how and "what value" of capacitor to take in to considerations for the calcaulations and simulations.

I have decided to Design the PLL for the range of 2.4GHz .( with Ring VCO and XOR PD and active LPF) . Is it possible to design in 1.2micron technology ..


pls reply soon..

savithru@hotmail.com

 

[dikshits]

vco architecture,specifications,

The Specs of the PLL will decide upon the application that you want to use the PLL in. You cannot decide on to the specs in an arbitrary fashion.

 

[rjshmadala]

vco specifications

Helloo savithru,
first u need to maintain differential pair transistors in saturation .for that u need to have common mode level between min and max levels.for min and max values go through
Desigon of analog integrated circuits by razavi.
and for highr swings voltage drop must be choosen optimum.how ever large voltage drop may force differential pair into triode region.this may cause noise at output.
specifications depends on u r application.so no one can fix specifications.if u specify application some one may give better specifications.
if we talk abot capacitor by changing delay one can chan ge frequency of ring oscilators ,so load capacitance should be choose optimum.how ever by increasing fo tail current increases output frequency.
u can design 2.4GHz ,but r u going to work with 1.2um(or)0.12um. with 0.12um u can achieve 2,4GHz very easily.

No One can give exact (W/L) and capacitor values.if some one already did same work before may can give .In analog ic desigining every thing is depend on another so there are no fixed values. expecting fixed values is absolutely wrong.
With basic rules try to change (W/L) values for example if u need more current increase W.

and morever u r unclear about u r project first be clear what u wanna do



Best Of Luck
Rajesh Babu Madala

 

[savithru]

specs of pll

Dear analog design experts..

Now coming in datail

I am desgning the PLL, nad some of the details are

1. I am using XOR PD. .

2.I am using ring VCO with differential dealy. I will take the Fcenter of my VCO to be 2.4G Hz.

3.The architecture I am using is the simplest topology i.e single Loop integer N PLL.

4. Initiallly I will start with the simple PLL to generate single frequency and later if time permits I will use it as frequency synthesizer by using divider in the feedback loop.

5. I am designing for 1.2 Micron tech . I am aiming at Semiconductor Complex Ltd Fab &nbspChandigarh, which uses 1.2micron tech ( pls note it is not .12u )

Above are the my field of applicatiom.and Now pls can you tell me what Capacitor valuues I can assume. Can you send some better specifications for my PLL.

pls reply soon.



1. kindly send the typical specifications.

2. I want the simplest VCo arhitecture for my VCO. This arch that I am using requres bias supply that makes my design a bit complex.

3. Pls give what things to be considered in designing XOR PD. ( like dalay, Capcitor values p.. Pls give some typical values to start with.

pls reply soon . I need urgent help.

urs
savithru

 

[mady79]

First check intrinsic frequency ft taking a single transistor for 1.2u technology .I am not sure if it works for 2.4GHz .

For designing a pll u need to find an application .
Major specs fora pll are

1)Jitter (this decides most of the applications)
2)Centre frequecny
3)Tuning range
4)frequency divider

good luck

 

[Teddy]

To me it is quite unclear what you want to achieve.
If you just want to demonstrate PLL functionality then you do not need any spec.
But I agree with above points.

with 1.2um to get 2.4GHz will be tricky. Better try to go to LCtank but I do not think you will be able to make it.

I would recommend to scale it down (again depends what you are trying to get) to aproximately 200MHz. In this range you will have more freedom to play and will still show the PLL calculation etc.

If you really need specs just try to go to icst.com and look for example for ICS501 and try to make this one. It has multiple divide ratios so as a project for PLL you can really do something decent.