Please help me with implementing a cam in a fpga

[bjzhangwn]

cam in fpga

I want to implemented the cam in the fpga,the entry is 2048,and the width is 32,the frequncy I need is not too much ,the read latency can be 3-4 cycles,and the cam core in xilinx fpga use the huge luts,so if I can reduce the lut by delay the data read out.

 

[chaitu2k]

Re: cam in fpga

U cld do it using Dual port Block RAMS available in Xilinx FPGAS. it would take abt 6 such Dual port BRAMS to implement your CAM abt 200 - 300 slices and 3-4 clocks for the output result ..depending on your coding skills...refer to xilinx document on implementing CAM...XAPP260....