Agreed, the diagram you've attached solves the problem. There's nothing to design here except details (choosing components and connecting pins properly).
The functional blocks in your picture are all single chip implementations. You need a 8 to 1 mux/encoder, a 3 to 8 demux/decoder, a binary counter, a 555 timer to generate the clock and a bunch of diodes and resistors to connect the seven segment display to the output of the decoder.