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Placement in innovus (encouner) cad tool

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sanjaysharmaiitk

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syntheses of a 8 bit counter has been completed through design compiler( synopsys cad tool ) after that gate-level-netlist file generated from design compiler and two LEF library file file are used for beck-eng design through innovus cad tool.
there are problem in placement of standard cell during placement tool skip the all buffer buff cell those are used in gete-level-netlist so problem came in lvs match.
how to place buffers along with standard cell. i got nothing despite applying many method.

i have uploaded gate-level-netlist of 8bit counter L3.png
in above gate-level-netlist
cell U4 ,U5 ,U15, U16 are buffd1 cell.
before placement buffd1 cell are seeing on innovus window P1.png
but a after placement buff cell are skipped by tool.L6.png
i also checked LEFF library file that have definition of buff.
how to place buffers along with standard cell.
 

please learn the entire physical synthesis flow, not only the placement command. go read innovus documentation.

the very first step of placement is buffer removal, to make sure buffers are not compromising the quality of the placement result. had you completed the flow, most buffers would probably be put back.
 

please learn the entire physical synthesis flow, not only the placement command. go read innovus documentation.

the very first step of placement is buffer removal, to make sure buffers are not compromising the quality of the placement result. had you completed the flow, most buffers would probably be put back.

thanks for answer and suggestion.


there was a problem in placement mode .
by default placement is optimized the netlist.
after setting another mode this problem is removed.
 

thanks for answer and suggestion.


there was a problem in placement mode .
by default placement is optimized the netlist.
after setting another mode this problem is removed.

there was no 'problem'. that is how you get the best placement results possible.
 

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