Place and Route - Slew rate outbound

[dshoter13]

Hi guys,

I am trying to place and route a digital design. During the pre place time analysis, the software (Innovus) issues a warning alerting that the slew rate of the several cells is out of bounds with regard to the value specified in timing lib. The weird thing is that I am specifying a maximum slew rate (max transition time) of 0.6ns, while the min bound of the lib is 0.5 ns. Unfortunately, during time analysis the Innovus software is considering that the slew rate is 0.25ns. My user design rule violations are less stricter than the ones specified by the tech (max capacitance etc).

Any suggestions regarding this?

Thank you for your time.

With best regards

P.S. - Although this software is different from SoC Encounter, almost all the commands and warnings are the same

 

[ThisIsNotSam]

Hi, I have seen the same behavior in Innovus for both GF14 and TSMC16. For me this warning is mostly related to the IO cells. A typical time for an IO to transition is ~0.7ns, and the first standard cell connected to the IO will always be 'out of bounds'. It is not a big deal as long as you understand what is happening and that the software will estimate/extrapolate the behavior of the standard cell.

 

[dshoter13]

Well, this is quite similar to my situation. However, I get such warnings only regarding IO cells and not the sub-sequent std cells.
Thank you very much for your time.

With kind regards.

Hi, I have seen the same behavior in Innovus for both GF14 and TSMC16. For me this warning is mostly related to the IO cells. A typical time for an IO to transition is ~0.7ns, and the first standard cell connected to the IO will always be 'out of bounds'. It is not a big deal as long as you understand what is happening and that the software will estimate/extrapolate the behavior of the standard cell.

 

[ThisIsNotSam]

have you tried to set a driver cell? (SDC command)

 

[dshoter13]

Actually I have not. This is because I do not know yet which block/cell/IO will be interfacing my chip from the outside world.
But any recommendations regarding that?

have you tried to set a driver cell? (SDC command)

 

[ThisIsNotSam]

you can just create a mock up scenario for now. use a big (X8,X16) buffer to drive the IO cells. should smooth things out.