Pheetuz
Full Member level 3
Hi,
I have a test system connected up atm where I am using the PSP to communicate between two PICs, however I am also using the PSP pins on the master to control, among other things, an LCD screen.
Basically I was wondering if there are any differences in behaviour between debug mode and release mode as whenever I use the slave PIC in debug mode the screen behaves very oddly, as if one of the PSP pins was stuck at a certain logic level instead of being high impedance like its supposed to be when in PSP mode.
Would be good if anyone could shed any light on this problem, I cant post the schematic as it is quite big and on about 40 pages but I am certain that the electronics themselves are fine.
Many thanks,
Pete.
I have a test system connected up atm where I am using the PSP to communicate between two PICs, however I am also using the PSP pins on the master to control, among other things, an LCD screen.
Basically I was wondering if there are any differences in behaviour between debug mode and release mode as whenever I use the slave PIC in debug mode the screen behaves very oddly, as if one of the PSP pins was stuck at a certain logic level instead of being high impedance like its supposed to be when in PSP mode.
Would be good if anyone could shed any light on this problem, I cant post the schematic as it is quite big and on about 40 pages but I am certain that the electronics themselves are fine.
Many thanks,
Pete.
