; *** main code goes here ***
movlw 0x42 ;internal 1MHz oscillator
movwf OSCCON
bcf TRISC,2 ;define CCP1 as output
movlw 0xc8 ;16bit/internal clock/no prescale/timer3 is compare clock source for both CCP modules(timer3 ticks every 4usec)
movwf T3CON
again
movlw 0x09 ;compare mode;initial high pull low upon match
movwf CCP1CON
movlw 0x3a
movwf CCPR1H
movlw 0x98 ;CCPR load for 60msec
movwf CCPR1L
bcf PIR1,CCP1IF ;clear CCP interrupt flag
bsf T3CON,TMR3ON ;start timer3
check1
btfss PIR1,CCP1IF ;check for compare match
bra check1
bcf T3CON,TMR3ON ;stop timer3
bcf PIR1,CCP1IF
movlw 0x08 ;compare mode;initial low set high upon match
movwf CCP1CON
movlw 0x1d
movwf CCPR1H
movlw 0x4c ;CCPR load for 20msec
movwf CCPR1L
bsf T3CON,TMR3ON
check2
btfss PIR1,CCP1IF ;check for compare match
bra check2
bcf T3CON,TMR3ON ;stop timer3
bcf PIR1,CCP1IF
bra again
end