void main(void)
{
TRISC = 0x18; // Set RC3(SCL) and RC4(SDA) as inputs.
ANSELC = 0; // In debug mode I can see RC3 and RC4 high after stepping into
// this line of code, so I know SDA and SCL are properly pulled
// high.
TRISB = 0; // Saving received I2C data in PORTB.
ANSELB = 0; // After this step the PORTB is filled with the last
// SSPBUF data (0X3C), I find this weird
RC3PPS = 0X14; //
RC4PPS = 0X15; // Setting RC3 and RC4 as SCL and SDA pins
SSP1CON1 = 0X28; // SSPEN - 1, SSPM - 1000
SSP1ADD = 0X03; // clock frequency 31.25 kHz
SSP1STAT = 0X80; // SMP - 1
// First write with slave address
SSP1CON2bits.SEN = 1; // Start I2C
while (SSP1CON2bits.SEN == 1); // Wait for "START" to finish
PIR3bits.SSP1IF = 0;
SSP1BUF = 0X3C; // LSM9DS0 Accelerometer address(with write bit)
// Page 33 in LSM9DS0 data sheet
while((PIR3bits.SSP1IF == 0) && (SSP1STATbits.BF == 1) && (SSP1STATbits.R_nW == 1));
PIR3bits.SSP1IF = 0; // Wait for transmission to complete
// Slave sub Address
SSP1BUF = 0X2C; // sub-address of Z-axis acceleration data
// register, first 8 bits
while((PIR3bits.SSP1IF == 0) && (SSP1STATbits.BF == 1) && (SSP1STATbits.R_nW == 1));
PIR3bits.SSP1IF = 0; // Wait for transmission to complete
// Repeated Start
SSP1CON2bits.RSEN = 1; // Repeated Start so that I can start reading the
// above Z axis data
while (SSP1CON2bits.RSEN == 1);/* Wait if Transmit in progress */
PIR3bits.SSP1IF = 0;
SSP1BUF = 0X3D; // LSM9DS0 Accelerometer address(with read bit)
// Page 33 in LSM9DS0 data sheet
while((PIR3bits.SSP1IF == 0) && (SSP1STATbits.BF == 1) && (SSP1STATbits.R_nW == 1));
PIR3bits.SSP1IF = 0; // Wait for transmission to complete
SSP1CON2bits.RCEN = 1; // Enable receive in I2C
//while ( SSP1CON2bits.RCEN == 1);
while(SSP1STATbits.BF == 0);
PIR3bits.SSP1IF = 0;
PORTB = SSP1BUF;
SSP1CON2bits.ACKDT = 1;
SSP1CON2bits.ACKEN = 1;
while( SSP1CON2bits.ACKEN == 1);
PIR3bits.SSP1IF = 0;
SSP1CON2bits.PEN = 1;
while(1);
}
SLRCONC = 0x00;
// CONFIG1
#pragma config FEXTOSC = LP // External Oscillator mode selection bits (LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power)
#pragma config RSTOSC = HFINT32 // Power-up default value for COSC bits (HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1)
#pragma config CLKOUTEN = OFF // Clock Out Enable bit (CLKOUT function is disabled; i/o or oscillator function on OSC2)
#pragma config CSWEN = OFF // Clock Switch Enable bit (The NOSC and NDIV bits cannot be changed by user software)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (FSCM timer disabled)
// CONFIG2
#pragma config MCLRE = OFF // Master Clear Enable bit (MCLR pin function is port defined function)
#pragma config PWRTE = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config LPBOREN = OFF // Low-Power BOR enable bit (ULPBOR disabled)
#pragma config BOREN = OFF // Brown-out reset enable bits (Brown-out reset disabled)
#pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices)
#pragma config ZCD = OFF // Zero-cross detect disable (Zero-cross detect circuit is disabled at POR.)
#pragma config PPS1WAY = OFF // Peripheral Pin Select one-way control (The PPSLOCK bit can be set and cleared repeatedly by software)
#pragma config STVREN = OFF // Stack Overflow/Underflow Reset Enable bit (Stack Overflow or Underflow will not cause a reset)
// CONFIG3
#pragma config WDTCPS = WDTCPS_31// WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
#pragma config WDTE = OFF // WDT operating mode (WDT Disabled, SWDTEN is ignored)
#pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
#pragma config WDTCCS = HFINTOSC// WDT input clock selector (WDT reference clock is the 31.25 kHz HFINTOSC)
// CONFIG4
#pragma config WRT = OFF // UserNVM self-write protection bits (Write protection off)
#pragma config SCANE = available// Scanner Enable bit (Scanner module is available for use)
#pragma config LVP = OFF // Low Voltage Programming Enable bit (High Voltage on MCLR/Vpp must be used for programming)
// CONFIG5
#pragma config CP = OFF // UserNVM Program memory code protection bit (Program Memory code protection disabled)
#pragma config CPD = OFF // DataNVM code protection bit (Data EEPROM code protection disabled)
void wait()
{
while(PIR3bits.SSP1IF == 0);
PIR3bits.SSP1IF = 0;
}
void main()
{
TRISC = 0x18;
ANSELC = 0;
TRISB = 0;
ANSELB = 0;
RC3PPS = 0X14;
RC4PPS = 0X15;
SSP1CON1 = 0X28; // SSPEN - 1, SSPM - 1000
SSP1ADD = 0X4F; // clock frequency 31.25 kHz
SSP1STAT = 0X80; // SMP - 1
while(1)
{
SSP1CON2bits.SEN = 1;
while (SSP1CON2bits.SEN == 1);
PIR3bits.SSP1IF = 0;
SSP1BUF = 0X3C; // Slave Add + Write
wait();
SSP1BUF = 0X2C; // Slave sub Add
wait();
SSP1CON2bits.RSEN = 1;
while (SSP1CON2bits.RSEN == 1);
PIR3bits.SSP1IF = 0;
SSP1BUF = 0X3D; // Slave Add + Read
wait();
SSP1CON2bits.RCEN = 1;
while (SSP1CON2bits.RCEN == 1);
wait();
PORTB = SSP1BUF;
SSP1CON2bits.ACKDT = 0;
SSP1CON2bits.ACKEN = 1;
while (SSP1CON2bits.ACKEN == 1);
wait();
SSP1CON2bits.PEN = 1;
__delay_ms(1000);
}
}
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