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Code - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FOSC INTOSC 0xFFFC WDTE OFF 0xFFE7 PWRTE OFF 0xFFFF MCLRE ON 0xFFFF CP OFF 0xFFFF BOREN OFF 0xF9FF CLKOUTEN OFF 0xFFFF VCAPEN OFF 0xFFFF STVREN OFF 0xFDFF BORV LO 0xFFFF LPBOR OFF 0xFFFF LVP ON 0xFFFF WRT OFF 0xFFFF IESO OFF 0xFFFF FCMEN OFF 0xDFFF
How to 16f1527 configure bits?
__CONFIG(1, FOSC_HS & PWRTE_ON & BOREN_OFF & WDT_OFF & MCLRE_ON & CP_OFF & CLOCKOUT_ON & IESO_OFF & FCMEN_OFF);
__CONFIG(2, WRT_OFF & VCAPEN_OFF & LVP_OFF & LPBOR_OFF & BORV_OFF & STVR_ON);
#ifndef _HTC_H_
#warning Header file pic16f1527.h included directly. Use #include <htc.h> instead.
#endif
/* header file for the MICROCHIP PIC microcontroller
* 16F1527
*/
#ifndef __PIC16F1527_H
#define __PIC16F1527_H
//
// Configuration mask definitions
//
// Config Register: CONFIG1
#define CONFIG1 0x8007
// Oscillator Selection
// ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin
#define FOSC_ECH 0xFFFF
// ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin
#define FOSC_ECM 0xFFFE
// ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin
#define FOSC_ECL 0xFFFD
// INTOSC oscillator: I/O function on CLKIN pin
#define FOSC_INTOSC 0xFFFC
// EXTRC oscillator: External RC circuit connected to CLKIN pin
#define FOSC_EXTRC 0xFFFB
// HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_HS 0xFFFA
// XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_XT 0xFFF9
// LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins
#define FOSC_LP 0xFFF8
// Watchdog Timer Enable
// WDT enabled
#define WDTE_ON 0xFFFF
// WDT enabled while running and disabled in Sleep
#define WDTE_NSLEEP 0xFFF7
// WDT controlled by the SWDTEN bit in the WDTCON register
#define WDTE_SWDTEN 0xFFEF
// WDT disabled
#define WDTE_OFF 0xFFE7
// Power-up Timer Enable
// PWRT disabled
#define PWRTE_OFF 0xFFFF
// PWRT enabled
#define PWRTE_ON 0xFFDF
// MCLR Pin Function Select
// MCLR/VPP pin function is MCLR
#define MCLRE_ON 0xFFFF
// MCLR/VPP pin function is digital input
#define MCLRE_OFF 0xFFBF
// Flash Program Memory Code Protection
// Program memory code protection is disabled
#define CP_OFF 0xFFFF
// Program memory code protection is enabled
#define CP_ON 0xFF7F
// Brown-out Reset Enable
// Brown-out Reset enabled
#define BOREN_ON 0xFFFF
// Brown-out Reset enabled while running and disabled in Sleep
#define BOREN_NSLEEP 0xFDFF
// Brown-out Reset controlled by the SBOREN bit in the BORCON register
#define BOREN_SBODEN 0xFBFF
// Brown-out Reset disabled
#define BOREN_OFF 0xF9FF
// Clock Out Enable
// CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#define CLKOUTEN_OFF 0xFFFF
// CLKOUT function is enabled on the CLKOUT pin
#define CLKOUTEN_ON 0xF7FF
// Internal/External Switchover
// Internal/External Switchover mode is enabled
#define IESO_ON 0xFFFF
// Internal/External Switchover mode is disabled
#define IESO_OFF 0xEFFF
// Fail-Safe Clock Monitor Enable
// Fail-Safe Clock Monitor is enabled
#define FCMEN_ON 0xFFFF
// Fail-Safe Clock Monitor is disabled
#define FCMEN_OFF 0xDFFF
// Config Register: CONFIG2
#define CONFIG2 0x8008
// Flash Memory Self-Write Protection
// Write protection off
#define WRT_OFF 0xFFFF
// 000h to 1FFh write protected, 200h to 3FFFh may be modified by PMCON control
#define WRT_BOOT 0xFFFE
// 000h to FFFh write protected, 2000h to 3FFFh may be modified by PMCON control
#define WRT_HALF 0xFFFD
// 000h to 3FFFh write protected, no addresses may be modified by PMCON control
#define WRT_ALL 0xFFFC
// Voltage Regulator Capacitor Enable bit
// VCAP pin function disabled
#define VCAPEN_OFF 0xFFFF
// VCAP pin function enabled
#define VCAPEN_ON 0xFFEF
// Stack Overflow/Underflow Reset Enable
// Stack Overflow or Underflow will cause a Reset
#define STVREN_ON 0xFFFF
// Stack Overflow or Underflow will not cause a Reset
#define STVREN_OFF 0xFDFF
// Brown-out Reset Voltage Selection
// Brown-out Reset Voltage (VBOR) set to 2.4V
#define BORV_LO 0xFFFF
// Brown-out Reset Voltage (VBOR) set to 2.7V
#define BORV_HI 0xFBFF
// Low-Power Brown Out Reset
// Low-Power BOR is disabled
#define LPBOR_OFF 0xFFFF
// Low-Power BOR is enabled
#define LPBOR_ON 0xF7FF
// Low-Voltage Programming Enable
// Low-voltage programming enabled
#define LVP_ON 0xFFFF
// High-voltage on MCLR/VPP must be used for programming
#define LVP_OFF 0xDFFF
//
// Special function register definitions
//
// Register: INDF0
volatile unsigned char INDF0 @ 0x000;
// bit and bitfield definitions
...
...
...
__CONFIG(1, FOSC_HS & PWRTE_ON & BOREN_OFF & WDT_OFF & MCLRE_ON & CP_OFF & CLOCKOUT_ON & IESO_OFF & FCMEN_OFF);
__CONFIG(2, WRT_OFF & VCAPEN_OFF & LVP_OFF & LPBOR_OFF & BORV_OFF & STVR_ON);
// Oscillator Selection
// ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin
#define FOSC_ECH 0xFFFF
// ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin
#define FOSC_ECM 0xFFFE
// ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin
#define FOSC_ECL 0xFFFD
// INTOSC oscillator: I/O function on CLKIN pin
#define FOSC_INTOSC 0xFFFC
// EXTRC oscillator: External RC circuit connected to CLKIN pin
#define FOSC_EXTRC 0xFFFB
// HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_HS 0xFFFA
// XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_XT 0xFFF9
// LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins
#define FOSC_LP 0xFFF8