PIC 18 Architecture studying

[FvM]

2.+3. has to be corrected. Programm memory content addressed by the table pointer goes only to the table latch.

 

[PA3040]

Dear FvM Thanks for the advice

Doesn't it need to decode the instruction point by table pointer
For decoding first the instructions should goes to instruction register to find op code and operand Am I correct?

Please advice
Thanks in advance

 

[FvM]

Data from dable accesses don't have to be decoded. They are to 8-Bit data, moved to or from the data bus.

Chapter 8 of the Family Reference Manual has many details about table access.

 

[PA3040]

Dear FvM

This codes i found in the chapter 8 in 18C Family Reference Manual

LFSR FSR0, RAMBUFADDR ;
MOVLW UPPER (Read Table) ;
MOVWF TBLPTRU ;
MOVLW HIGH (Read Table) ;
MOVWF TBLPTRH ;
MOVLW LOW (Read Table) ;
MOVWF TBLPTRL ;
TBLRD*+ ; Read location and then increment
; the table pointer
MOVFF TABLAT, POSTINC0 ; Copy contents of table latch to the
; indirect address and then
; increment the indirect address
; pointer.

How should I identified the instructions that fetch by table pointer and program counter as well as non decoded instructions
Please advice
This are very interesting to study
it should be much appreciated you continuous advice
Thanks in advance

 

[betwixt]

I think the confusion is over the reason for having the TABL instructions in the first place.

The program counter is exclusively responsible for fetching INSTRUCTIONS and unless diverted by a jump/branch instruction it advances along the instructions one at a time. Only the program counter can point to instructions to be executed.

The TABL instructions are for data storage. The address is split into three because the register width is too narrow (8 bits) to cover the entire memory range in one go, these are referred to as TBLPTRU, TBLPTH and TBLPTRL, the last letter referring to Upper, High and Low. The table address is these combined to make 3 x 8 = 24 bits. The data at the table address is 8 bits wide and is read using the TBLRD and associated write instructions. Some of the instructons have automatic increment or decrement versions because reading data sequentially is such a common requirement, they automatically add or subtract one from the value in the TBLPTRx registers so they 'point' to the next data in the table. This saves having to reload the address each time when the next value in the table is needed, each read/write operates on the next address automatically.

Data is never executed, the TABLPTR values are not put into the program counter unless the program is written to make that happen. For example, the programmer could use the data table to hold addresses, read them then load them into the program counter but the hardware will never do that by itself.

Brian.