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PHY, SerdEs, PLL in FPGA

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sun_ray

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PHY, SerDes, PLL in FPGA

What is the name of the PHY block in Xilinx virtex FPGA board? What is the name of the PLL block in Xilinx Virtex FPGA board? What is the name of a SerDes block in Xilinx virtex FPGA board?
 

sharath666

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Which board are you referring to? U will need to check the board datasheet or check it on the xilinx website. This is too general a question..
 

KlausST

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Hi,

PHY, serdes, pll are sections within an FPGA chip, not a board.

Klaus
 

vGoodtimes

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This is not a good interview question at this time.

These are all parts of the MGT/GTP/GTP/GTX/GTX/GTH/GTH/GTZ tiles. The repetition is intended -- the same names were given to tiles with differing specifications. In some cases these have shared PLL blocks as well, which are listed as a separate component.

PHY might incorrectly refer to the EMAC block as well. not all interview questions are well thought out.
PHY might refer to the IOBUFFER as well.

SERDES might refer to the ISERDES/OSERDES blocks, or the SRL16/SRL32 blocks.

PLL might incorrect refer to DCM, or may refer to either MMCM or PLL blocks.
 
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