Phase-shifter 90 degree

[MacBam]

[/QUOTE]
differential phase ripple ?

High rather than low slew rate, according to the maximum signal voltage. I think many of recent CMOS general purpose OP can do. Don't know if the dynamic range requirements are particularly high? What's the acceptable differential phase ripple?

Differential Phase ripple? I am designing my filters with 2-5% resolution. Also, I am looking for a chip that contains many op-amps, since I am using stages.

 

[danadakk]

One approach to this, with clock accuracies, is to use DDS, there are dual
channels that can gen the quadrature in one package. These are a bit
expensive., or use two of the cheap ones, $ 2 - $ 5 kinds of parts, and synch
them.

AD9854 Datasheet and Product Info | Analog Devices

The AD9854 digital synthesizer is a highly integrated device that uses advanced DDS technology, coupled with two internal high speed, high performance quadrature DACs to form a digitally programmable I and Q synthesizer function. When referenced to an accurate clock source, the AD9854 generates...

www.analog.com

https://www.analog.com/media/en/technical-documentation/application-notes/AN-587.pdf

synching el cheapo ap note

You get very accurate freq and phase, no component tolerance issues
or drift (other than main clock, nominally xtal based), and very wide
sweep ranges from sub Hz into 100's of Mhz.

Regards, Dana.

 

[FvM]

I'm asking about the maximal deviation from 90 degree phase shift in the frequency band of interest. The approximation will usually designed with equiripple characteristic.

Quad OP would be my first choice.

 

[psoc77]

Hi,

I am looking for a phase-shifter circuit, that can shift a signal with 90 degrees - over a frequency range (eg. 50kHz to 200 kHz). Any suggestion?

Best regards,

This is one possible solution using PSoC5 micro:
Phase offset and Quadrature signal generator for lock-in
The demo project shows generation of phase-shifted output signal for arbitrary phase. The project uses digital Counter to measure period of the input clock and to generate a phase-shifted (quadrature) copy of it. I find this approach more stable (less phase jitter) than using a PLL.

YouTube video: