phase noise performance of an RFDAC

[exp]

Hi,

I need to generate a more complicated clocking waveform. For the proof of concept I think about "brute-forcing" it with an RFDAC.

Unfortunately I can not find any information of expected performance in terms of phase noise/jitter of a clock that is generated with an RFDAC. The datasheets do not contain these plots.

Does anyone have experience which phase noise performance can be achieved with a state of the art RFDAC (e.g. MAX5882)?

Can they approach PLL performance (total integrated jitter for 1-2GHz around 100-200fs RMS)?

Best would would be PN spectrum of a clock generated with an RFDAC in terms of dBc/Hz at different offsets.


Thank you!

 

[biff44]

if you know the total jitter, then you know the integrated phase noise. so that is a start.

they have an application note using that dac as a QAM modulator. If you can figure out what type of qam modulation (256 for example), you can deduce that it would have to be better than the phase noise typically used for those types of systems.

That particular chip data sheet is available only by request, so I can not comment further

 

[exp]

if you know the total jitter, then you know the integrated phase noise. so that is a start.

Actually, the total jitter is what I am interested in the first place anyway.

they have an application note using that dac as a QAM modulator. If you can figure out what type of qam modulation (256 for example), you can deduce that it would have to be better than the phase noise typically used for those types of systems. That particular chip data sheet is available only by request, so I can not comment further

Thanks, that's a good argument, I will try to get access to the information.

On the other hand, I think if I can only rely on the lower bound, this is too low anyway. For example, from https://electronix.ru/forum/index.php?act=Attach&type=post&id=64022, SNR=41 dB for 10^-10, 1024 QAM. To my understanding this is around 500fs - 1ps RMS jitter, at best, if phase noise is the only impairment. However, for the prototype I would require something like 100-200fs.

Apart from the MAX5882, do you have any experience with any other RFDACs what could be achieved?