Phase margin plot of LDO

[FvM]

No, distance from 0 degree. Your phase plot starts at 180 degree (negative feedback) and decreases monotonously. When it crosses the 0 degree with magnitude >= 0 dB, the feedback circuit is unstable according to Bode stability criterion.

 

[promach]

Without output load capacitor, CL as a dominant pole, the phase margin is still quite close to 0 degree.

I tried to adjust the values of miller capacitors C1 and C2, but phase margin is still not doing any better.

Any advice ?

 

[promach]

The phase margin test circuit (middlebrook method) that I am using now is still incorrect.
I have not included the test current injection to be included in the middlebrook AC analysis (loop gain and phase margin)

See https://github.com/Ribster/LTSpice/issues/1 and equation 5 inside Comparative Analysis of Simulation-Based Methods for Deriving the Phase- and Gain-Margins of Feedback Circuits With Op-Amps for more context

I have also attached a zip file containing various AC analysis methods in this post.

 

[FvM]

The phase margin test circuit (middlebrook method) that I am using now is still incorrect.
I have not included the test current injection to be included in the middlebrook AC analysis (loop gain and phase margin)

Disagreed. Referring to your latest test circuit in post #13, Middlebrooks method is applied correctly, except for a wrongly calculated loop gain which should be Vfeedback/Vfb rather than Vout/Vfb. The complete Middlebrook circuit must be applied, if Vfb is significantly loaded, which is obviously not the case here.

Problem of this circuit isn't wrong loop gain analysis but unsuitable amplifier topology with excessive poles in the first stage.

 

[promach]

Middlebrooks method is applied correctly, except for a wrongly calculated loop gain which should be Vfeedback/Vfb rather than Vout/Vfb.

Why Vfeedback/Vfb ?

The complete Middlebrook circuit must be applied, if Vfb is significantly loaded

Why so ?

 

[FvM]

Why Vfeedback/Vfb ?

Because you wan't to measure loop gain, read Middlebrook method explanations or compare the #13 schematic with the Middlebrook circuits you have posted in your other thread. For the voltage injection method, loop gain is the ratio of voltages measured at both sides of the injection source.

Why so ?

Your posts give the impression that have thoroughly read about loop gain measurement methods. It seems to me however that you still have problems to grasp the basic idea behind it. To quote the original paper R. D. Middlebrook, Measurement of loop gain in feedback systems:

For the voltage injection form of the loop-gain measurement method to give the correct result, it is necessary that the injection be performed at a point in the loop at which the impedance Z2 looking 'backward' from the injection point is sufficiently smaller than the impedance Z1 looking 'forward' from the injection point. The opposite condition, Z2>>Z1 is necessary for the current injection technique to give a correct result. Since in a practical system it may not be possible to find an inject.ion point that satisfies either of these extreme conditions, at least over the entire frequency range of interest, it is desirable to extend the loop-gain-measurement method to be applicable at an injection point where the impedance ratio Z2/Z1 is arbitrary.

Fortunately, in a circuit like yours where Z1 is a MOSFET gate terminal, Z1>>Z2 can be easily fulfilled in the low and medium frequency range. Hence voltage injection gives the correct loop gain.

 

[promach]

Problem of this circuit isn't wrong loop gain analysis but unsuitable amplifier topology with excessive poles in the first stage.

Which exact mosfet or circuit node in the first stage contributes to excessive poles ?

Middlebrooks method is applied correctly, except for a wrongly calculated loop gain which should be Vfeedback/Vfb rather than Vout/Vfb.

However, I do not know why LTSpice does not allow the syntax "v(Vfeedback)/v(Vfb)" to be used ?

 

[FvM]

Which exact mosfet or circuit node in the first stage contributes to excessive poles ?

See my previous post #11.

However, I do not know why LTSpice does not allow the syntax "v(Vfeedback)/v(Vfb)" to be used ?

I have no problem to use it.

 

[promach]

I don't see zeros but a relative low frequent pole in the input stage resulting in insufficient phase margin. Reason is the low current mirror transistors M11 and M17.

What do you exactly mean by low current mirror transistors ?

LTSpice does not allow the syntax "V(Vfeedback)/V(Vfb)" to be used

LTspice only have I(Vfeedback), but no V(Vfeedback)

 

[FvM]

What do you exactly mean by low current mirror transistors ?

Look at the bias current e.g. of M11 compared to M12. I presume it's not intentionally that low.

O.K. the node name at the right side of the injection source is N015 rather than Vfeedback. Sorry for confusion.

 

[promach]

If I make M11, M12, M16 and M17 to have the same m=8 , then see the following bode waveform :

However, this comes at a trade-off of a much larger load regulation spike (800mV) in Vout

 

[FvM]

If I make M11, M12, M16 and M17 to have the same m=8 , then see the following bode waveform :

M11/M17 bias current becomes even smaller then.

Unfortunately I'm not occupied with analog IC design and have no specific suggestion to fix the circuit. Just looked at stage frequency reponses and how they contribute to overall loop gain.

 

[promach]

For the voltage injection form of the loop-gain measurement method to give the correct result, it is necessary that the injection be performed at a point in the loop at which the impedance Z2 looking 'backward' from the injection point is sufficiently smaller than the impedance Z1 looking 'forward' from the injection point. The opposite condition, Z2>>Z1 is necessary for the current injection technique to give a correct result. Since in a practical system it may not be possible to find an inject.ion point that satisfies either of these extreme conditions, at least over the entire frequency range of interest, it is desirable to extend the loop-gain-measurement method to be applicable at an injection point where the impedance ratio Z2/Z1 is arbitrary.

impedance Z1 looking forward around the loop is much greater than the impedance Z2 looking backward, so that Vy, approximates the voltage of an ideal voltage generator, as required for the model of Fig. 2 (a) to be valid.

How are Z1 and Z2 related to ideal voltage generator ?

 

[promach]

Edit : The impedance ratio requirement for Middlebrook voltage injection method is explained at https://www.omicron-lab.com/fileadmin/assets/Bode_100/Documents/Bode_Info_LoopGain_V1_1.pdf#page=7