Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

phase margin issue with a positive feedback in current mirror OTA

Status
Not open for further replies.
I think my comments are invisible, the output impedance doesnt change, because hes adding a parallel rds to a 1/gm, 1/gm will win without much budge.
the gain is as the book says a ratio of the pos fb and the neg fb(bad things can happen when the ratio =1). the reduced pm is due to the added cgs and cds on the drain of the input pairs, which impacts both pole1 and pole2.
to calculate the actual pole change you need to do the math,
1)create the small sig equation for vout over vin while keeping all the caps (including the miller Cgd cap)
this will give you a numerator and denominator with s terms on bottom and possibly top. rearranging these terms should give you an s term polynomial
1b) the denominator form should be s^2A + sB + 1, i would ignore any s^3 terms if you have any.
2) pole form = s^2/(p1 * p2) + s/(p1) +1
pole 1= 1/B
pole 2 = 1/(A*pole1)
 

Thank you LvW very much

Actually I told you about the load capacitor from the previous post (Load is purce capacitive with CL=50 PF).

this paper is useful

this paper is useful I think



Junus,

up to now you didn`t tell us about the load capacitor.

Knowing this, I have the following comments:
* The additional circuitry (you call it "pos. feedback") enhances the transconductance and, thus, the overall gain. This is the desired and expected effect.
* At the same time the output resistance certainly will be effected - but I don`t know in which way. However, this modified output resistance - together with the capacitive load - will change the phase response of the whole circuit. Thus, no surprise.
* More than that, I think this additional "pos. feedback" cannot be compared with the "normal" pos. feedback (and it´s consequences) as known, for example, from opamps in the voltage feedback mode.
* That means: It is clear that the gain as well as the phase response is effected by the additional circuitry - however, I am not able to give further detailed explanations without time consuming additional investigations.

I am afraid, that´s all one can say - unless somebody has gained already some experience with this circuit.
 

Attachments

  • pffffffffffff.pdf
    276.6 KB · Views: 59

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top