Why don't we generate Phase Interpolator using RC Delay ( LPF).
Just by changing the R/C Value, delay can be generated and it can be go through a comparator or Strong ARM to get the suare wave with Delay based on digital code.
"We"? I've done it (decade or more ago, 800MHz PECL
clock recovery). Made 8 phases from the single incoming,
with the non-quadrature ones by interpolation as you
say (comparator, forget it - inverters were all that could
hang with that clock in 3.3V RF SOI CMOS).
That said I'm not a fan of how the interpolated phases
degrade edge rate (@ the RC and next stage), picking up
more phase noise / jitter.