PFC FETs should not be paralleled?

[cupoftea]

Hi,
Do you agree that PFC FETs should not be paralleled?
Instead they should switch alternately, each over 10ms.

If paralleled, then one will take all the high switch-ON switching loss, and possibly fail.
(Switch OFF can be done much faster than switchON, so involves less switching loss).

 

[Easy peasy]

PFC mosfets are commonly paralleled - just a little in house know is needed to keep them sharing under switching conditions.

 

[cupoftea]

Thanks, and even of they are sharing current very well, one of the pair of parallelee's is likely to take all the switchON switching loss?

 

[FvM]

"sharing under switching conditions" doesn't seem to involve ambiguities.

In a reasonable layout, source inductance provides sufficient balancing. In case of kelvin source components, a resistor network can generate an average source potential as driver reference.

I wonder why you specifically refer to PFC switches, the situation is almost the same for any hard switching topology.

 

[cupoftea]

I wonder why you specifically refer to PFC switches, the situation is almost the same for any hard switching topology.

Thanks, as you know, Boost PFCs are unusual, in that they are used up to several kW's but are not isolated.
As you know, when an isol txfmr is used in SMPS, the leakage inductance acts as a turn ON snubber for the FETs....so the switching losses are not so bad.

As you know, the vast majority of offtheshelf SMPS's of above 200W or so , are almost invariably isolated.........i was once asked why all vicorpower high power power modules were always isolated....and of course as you know, the reason is two-fold...

1....Reduction of turn on switching loss
2....Its easier to protect against load side failure causing vast damage if transformer isolated.

Part 2 has been debated on this forum some 1-2 years ago.......its actually not a foregone conclusion, and quite a grey area.
Transformer isolation is also better for EMC , due to the turn on snubber effect described.......but having said that...take any transformer isolated topology, and directly connect primary and secondary grounds, (so its not actually isolated any more) and you will always get a better pass at EMC.

 

[Easy peasy]

A pfc is no more unusual than the bottom leg ( or any leg ) of an H bridge that is hard switching - fets are paralleled in both cases where the need arises

many power modules have parallel mosfet die inside them, etc, etc ....

 

[mtwieg]

Do you agree that PFC FETs should not be paralleled?

wrt the original topic, no there's nothing special about a boost PFC (or a boost converter in general) which makes paralleling FETs difficult.

Instead they should switch alternately, each over 10ms.

I've never seen such a scheme, sounds far more difficult to implement properly than just putting FETs in parallel.

--- Updated Mar 12, 2022 ---

Thanks, as you know, Boost PFCs are unusual, in that they are used up to several kW's but are not isolated.
As you know, when an isol txfmr is used in SMPS, the leakage inductance acts as a turn ON snubber for the FETs....so the switching losses are not so bad.

As you know, the vast majority of offtheshelf SMPS's of above 200W or so , are almost invariably isolated.........i was once asked why all vicorpower high power power modules were always isolated....and of course as you know, the reason is two-fold...

1....Reduction of turn on switching loss
2....Its easier to protect against load side failure causing vast damage if transformer isolated.

I don't agree with any of this.

 

[crutschow]

As long as the gate control signal can provide sufficient current to rapidly (<1µs) charge and discharge the total gate capacitance, then there should be not problem in paralleling MOSFETS of the same type, since there switching times will be close to identical.

 

[cupoftea]

I don't agree with any of this.

Thanks, as you know, there are LTspice sims of this on this forum, demo'ing the turn-on snubber effect of the leakage inductance in the transformer.....i can dig some out if its wanted....sims are not real life, but in this particular facet, they are close enough. As you know, in the Boost PFC there is no txfmr, and so the reverse recovery can be severe if sic not used.

 

[mtwieg]

Thanks, as you know, there are LTspice sims of this on this forum, demo'ing the turn-on snubber effect of the leakage inductance in the transformer.....i can dig some out if its wanted....sims are not real life, but in this particular facet, they are close enough. As you know, in the Boost PFC there is no txfmr, and so the reverse recovery can be severe if sic not used.

Those simulations hardly support an assumption as broad as isolated supplies having superior EMC than non isolated supplies. How would you even suppose to compare two broad categories (with the numerous different topologies within each category) in a meaningful way?

I think you might be equivocating "isolated" supplies with soft switching topologies like PSFB or LLC.

As you know, when an isol txfmr is used in SMPS, the leakage inductance acts as a turn ON snubber for the FETs....so the switching losses are not so bad.

1. In most topologies, leakage inductance is what leads to the energy which requires snubbing, and is not at all desirable. In a few cases (again, PSFB and LLC) the leakage can be absorbed into a resonant inductor, so it's not harmful (but is usually inferior to a discrete inductor performing the same role by itself).
2. "Leakage" inductance is present in all SMPS circuits in the form of parasitic inductances switching paths. But in the vast majority of situations, it does far more harm than good.

 

[cupoftea]

1. In most topologies, leakage inductance is what leads to the energy which requires snubbing, and is not at all desirable. In a few cases (again, PSFB and LLC) the leakage can be absorbed into a resonant inductor, so it's not harmful (but is usually inferior to a discrete inductor performing the same role by itself).
2. "Leakage" inductance is present in all SMPS circuits in the form of parasitic inductances switching paths. But in the vast majority of situations, it does far more harm than good.

I agree the txfmr leakage L has its downside....as you say, it leads to snubbing being needed.....but this is preferable to having no leakage, and then your full bridge say, has high fet overlap switching loss at switch on.

BTW, i am not saying that it always leads to better EMC......i am syaing it reduces turn on switching loss in the FETs.

Even in the PSFB, the leakage L needs snubbing, and in that way is a downside of it....so yes, leakage L is not perfect, as you well know, but is better than "no leakage in the txfmr".

BTW....some weeks ago we were discussing Half bridges with very high leakage inductance, and how this can result in severe reverse recovery on the primary FETs.....and in that case...the leakage is not wanted at that high level.....but there is a small amount of leakage L in Half/full bridges/2TF, which is overall beneficial......In reduction of fet switching losses....but yes, beware...because too much txfmr leakage and its bad news........you need enough dead time to let the leakage current flow die out, or ring out........else sever reverse recovery can result.

 

[mtwieg]

BTW, i am not saying that it always leads to better EMC......i am syaing it reduces turn on switching loss in the FETs.

You said this:

Transformer isolation is also better for EMC , due to the turn on snubber effect described

But I also disagree with leakage generally reducing losses as well.

Even in the PSFB, the leakage L needs snubbing, and in that way is a downside of it....so yes, leakage L is not perfect, as you well know, but is better than "no leakage in the txfmr".

This just doesn't make sense. The leakage needs snubbing, and it's a downside, but the leakage is still better than no leakage? What?

BTW....some weeks ago we were discussing Half bridges with very high leakage inductance, and how this can result in severe reverse recovery on the primary FETs.....and in that case...the leakage is not wanted at that high level.....but there is a small amount of leakage L in Half/full bridges/2TF, which is overall beneficial......

I recall in those simulations that there was no filter inductor on the secondary side, which left the leakage as the only thing limiting di/dt in the FETs. The proper solution is to use a secondary filter inductor, not add leakage.

In reduction of fet switching losses....but yes, beware...because too much txfmr leakage and its bad news........you need enough dead time to let the leakage current flow die out, or ring out........else sever reverse recovery can result.

Could you show an example of what you're talking about? Depends where the leakage is in the circuit...

Thanks, as you know, Boost PFCs are unusual, in that they are used up to several kW's but are not isolated.
As you know, when an isol txfmr is used in SMPS, the leakage inductance acts as a turn ON snubber for the FETs....so the switching losses are not so bad.

As you know, the vast majority of offtheshelf SMPS's of above 200W or so , are almost invariably isolated.........i was once asked why all vicorpower high power power modules were always isolated....and of course as you know, the reason is two-fold...

1....Reduction of turn on switching loss
2....Its easier to protect against load side failure causing vast damage if transformer isolated.

Part 2 has been debated on this forum some 1-2 years ago.......its actually not a foregone conclusion, and quite a grey area.
.......but having said that...take any transformer isolated topology, and directly connect primary and secondary grounds, (so its not actually isolated any more) and you will always get a better pass at EMC.

 

[cupoftea]

I recall in those simulations that there was no filter inductor on the secondary side, which left the leakage as the only thing limiting di/dt in the FETs. The proper solution is to use a secondary filter inductor, not add leakage.

Thanks, yes, thats what i would have thought until recently.
We had some customer power supplies sent in for analysis....

One was a 750W 100-265VAC half bridge with no output inductor....and it has fantastic lifetime...well over 10 years for loads of them......the only failures i saw were fan fails....think they were for use in oil/gas ind'ry.....they were using loads of them in paralleled groups....Load share controller UC390X.

Other was again a half bridge with no output inductor.....(but had 7 torroids round the busbar from output diodes to output cap bank) at 3.2kW....very reputable manufacturer in Holland.....3phase mains input 415vac...6 pulse rect....12v, 300a output.

So i have to say that my own opinion on the half bridge with no output inductor has well changed.

However, i suspect that it was (i dont know) with perhaps a constant load without transients?...or maybe the useage was very low at max load?....ie not many minutes per day.....but i really dont know.......there were certainly absolutely loads of the 750W ones with >>10year lifetime and counting.

Ill see if i can get the sim you spoke of...i certainly did the sims at the time....