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Passing parameter from eldo command to verilog-a code

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fidobido

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Hi All,

I've just learned Verilog-A and I need to simulate a verilog-a and spice views with Eldo through Pyxis Schematic, I defined a parameter inside module as follow: "parameter real P=2" , I need to change this parameter through Eldo command as we do in spice circuit as ".param P=50". How can I do that ?


Thanks
 

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