msdarvishi
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Hello everybody,
I would like to perform Partial Reconfiguration via ICAP in Virtex-5 (XC5VLX50T) on Xilinx Gensys board. I see it is necessary to have an internal processor and as I guess it should be a microblaze. I have some questions...
1. Is it true tht I have to enable the microblaze for interfacing with ICAP?
2. How can I enable microprocessor inside FPGA and interface it with ICAP? can anyone has a vhdl code to sugest me?
3. What is HWICAP and its relevance to internal partial reconfiguration?
4. Can you give me an outline how to go for this design??
Thanks to all,
I would like to perform Partial Reconfiguration via ICAP in Virtex-5 (XC5VLX50T) on Xilinx Gensys board. I see it is necessary to have an internal processor and as I guess it should be a microblaze. I have some questions...
1. Is it true tht I have to enable the microblaze for interfacing with ICAP?
2. How can I enable microprocessor inside FPGA and interface it with ICAP? can anyone has a vhdl code to sugest me?
3. What is HWICAP and its relevance to internal partial reconfiguration?
4. Can you give me an outline how to go for this design??
Thanks to all,