papers for low drop, High PSRR on chip regulator

[bageduke]

psrr and lowdrop

Does anybody have papers for low drop, high PSRR on chip regulator? I want to design an on-chip regulator with 1.3V power supply and the PSRR is above 45dB with 0.2V drop.

Thanks a lot

 

[leo_o2]

what's the frequency range for 45dB PSRR?

 

[bageduke]

I am looking at at least 45dB PSRR at 3.2MHz. Thanks,

what's the frequency range for 45dB PSRR?

 

[leo_o2]

What's the current load.
Mission impossible for fully integrated (including the output cap), I think. You can imagine 3.2MHz is out of LDO's bandwidth. At that frequency, PSRR depends on voltage dividing between parasite cap and output cap.

Added after 3 seconds:

What's the current load?
Mission impossible for fully integrated (including the output cap), I think. You can imagine 3.2MHz is out of LDO's bandwidth. At that frequency, PSRR depends on voltage dividing between parasite cap and output cap.

 

[bageduke]

The current load is not very high. Normally, it's about 6mA, so I am trying to design one can handle 10mA.

Thanks,

Kun

What's the current load.
Mission impossible for fully integrated (including the output cap), I think. You can imagine 3.2MHz is out of LDO's bandwidth. At that frequency, PSRR depends on voltage dividing between parasite cap and output cap.

Added after 3 seconds:

What's the current load?
Mission impossible for fully integrated (including the output cap), I think. You can imagine 3.2MHz is out of LDO's bandwidth. At that frequency, PSRR depends on voltage dividing between parasite cap and output cap.

 

[pgoyal]

Please have a look at "Rincon Mora" papers on LDO. you can easily find while googling.