Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

paper"Clock jitter in class-D audio power amplifiers&qu

Status
Not open for further replies.

edisonliu

Junior Member level 3
Joined
Aug 19, 2006
Messages
25
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,435
has anyone the paper?

Clock jitter in class-D audio power amplifiers

4430338 abstract

Access The Full Text
Sign In:Full text access may be available with your subscription

User Name Password
Forgot Username/Password?

Berkhout, M.
NXP Semicond., Nijmegen

This paper appears in: Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Publication Date: 11-13 Sept. 2007
On page(s): 444 - 447
Location: Munich
ISSN: 1930-8833
Print ISBN: 978-1-4244-1125-2
INSPEC Accession Number: 9836008
Digital Object Identifier: 10.1109/ESSCIRC.2007.4430338
Current Version Published: 14 一月 2008

Abstract
Many class-D audio amplifiers use a reference clock to fix the PWM carrier frequency. The jitter of the reference clock can cause

significant voltage noise at the amplifier output. In this paper a simple model is presented that allows accurate prediction of

the noise contribution from an integrated regenerative sawtooth oscillator to the output noise of a class-D audio amplifier. The

implementation of an oscillator in a class-D amplifier is presented and the model is verified with measurements.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top