Overcurrent protection

[pona]

I want to design an overcurrent limiter for low voltage applications. I have searched net and only found circuits with atleast 0.7 volts voltage drop. Can anyone plz help me in designing circuit with lower voltage drop?

 

[kwkam]

it depends on what is your define of over current, by current, voltage or temperature? Then you are easy to design what you need

 

[DXNewcastle]

To detect the current, it is usual to insert a small resistor in the current path and therefore measure the voltage drop across that resistor.
If you wanted only a small voltage drop, then you would design a circuit which measured small voltage drops.

In your example, a 0.7v voltage drop would appear across a resistor of 0.7ohms when 1Amp flowed through it. For less voltage drop, (at 1 Amps) you would use a lower value resistor.
Perhaps you are looking only at current limiting using a single transistor where the base-emmiter voltage of around 0.7v will be a fixed value? If so, you can look at other designs. Some people use the differential inputs of an Op-Amp (with a slight bias) connected to either end of the small resistor; this can detect currents through the resistor with much less than 0.7 voltage difference between each input and will be working more like a comparator with a high or low output indicating over- or under-current.

 

[dick_freebird]

You can make "lossless" current sensing which is as good as your
transistor matching, though it takes some elaborateness to drive
out all the systematic error sources (for example your sense path
FET needs to be maintained at the same headroom as the switch
FET, in-the-moment, or the difference between a linear-region
switch and a saturation-region sense device makes natural match
moot. Your advantage is zero added switch drop. Your costs are
complexity, the probability that where you sense has a different
current density than elsewhere in the power device, and so on.
But you can do better than 10% tolerance if you are good with
the physical design and analysis of layout effects.

 

[DXNewcastle]

dick_freebird
Your remark "the probability that where you sense has a different current density than elsewhere in the power device" reminded me that there are also methods of current estimation (as opposed to current sensing) which do not intervene in the current path at all.
Its perfectly possible to monitor other activity in a circuit (eg the control signals within a power supply regulator) to determine what it will be doing.
For example, if there is a measureable base drive current into a conventional regulator's output device, then an estimate of actual current can be made; any losses in measuring the current into the base are within the voltage feedback loop of the regulator and therefore have no impact on the output voltage.
More complex variants might monitor switching pulse widths and density in a SMPS or even the incoming current. I guess many of these alternative strategies make some contentious assumptions about the integrity of the circuit's performance and reliability, assumptions which may undermine the value of current monitoring and limiting!

 

[checkmate]

You can make "lossless" current sensing which is as good as your
transistor matching, though it takes some elaborateness to drive
out all the systematic error sources (for example your sense path
FET needs to be maintained at the same headroom as the switch
FET, in-the-moment, or the difference between a linear-region
switch and a saturation-region sense device makes natural match
moot. Your advantage is zero added switch drop. Your costs are
complexity, the probability that where you sense has a different
current density than elsewhere in the power device, and so on.
But you can do better than 10% tolerance if you are good with
the physical design and analysis of layout effects.

You do not really need to ensure the above for a current limiting senseFET.
You only need those if you want to be able to measure the current.

 

[dick_freebird]

In my latest design we were indeed interested in accuracy
of the current limit. Across a wide operating envelope. The
less you care about, the easier things get.

 

[leo_o2]

Pls use source input comparator for lower voltage drop.
However low input offset and high speed should be challenges.

I want to design an overcurrent limiter for low voltage applications. I have searched net and only found circuits with atleast 0.7 volts voltage drop. Can anyone plz help me in designing circuit with lower voltage drop?