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output voltage swing !

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biolycans

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Hi,

I designed an operation amplifier two stage and I want to simulate the output voltage swing. Does anyone know what configuration should I use ?

Regards !

Joaquin
 

I do not know what you want to measure.
If the opamp is Cmos and the load resistance is high then the output voltage swing is rail-to-rail.
if the opamp uses ordinary transistors then the output voltage swing depends on how many emitter-followers there are at the output.
 

I do not know what you want to measure.
If the opamp is Cmos and the load resistance is high then the output voltage swing is rail-to-rail.
if the opamp uses ordinary transistors then the output voltage swing depends on how many emitter-followers there are at the output.

Hi thank you for your response. The opamp is CMOS.
 

The opamp is CMOS.
Do you want to simulate its maximum output voltage swing?
Then set its voltage gain to whatever you want, feed it a suitable input sinewave and turn up the level until the output begins to clip. That is its maximum output voltage swing.
 

Do you want to simulate its maximum output voltage swing?
Then set its voltage gain to whatever you want, feed it a suitable input sinewave and turn up the level until the output begins to clip. That is its maximum output voltage swing.

For example I use an inverting configuration with a gain of 10. In the inverting input I put an AC signal. Then I change the value of voltage of this signal and I measure in the output the value when this signal start clipping.

Am I correct ?
 

For example I use an inverting configuration with a gain of 10. In the inverting input I put an AC signal. Then I change the value of voltage of this signal and I measure in the output the value when this signal start clipping.

Am I correct ?
Yes. Then if the circuit is like all the other Cmos opamps its output swing will be from 0V to the positive supply voltage.
 

Yes. Then if the circuit is like all the other Cmos opamps its output swing will be from 0V to the positive supply voltage.

I did what you told me. In the inverting input I put a 0.3 V AC signal. The voltage supply for the opamp is Vdd =2.5 V and Vss = -2.5 V. Then the gain is 10.

the simulation I obtained is in the attachment. Do you know why I have more swing in the negative than in the positive ?

Thank you.

Joaquin
 

Attachments

  • Output_voltage_swing.pdf
    104.7 KB · Views: 71

Run DC simulation with dc sweep of input voltage source. You should obtain a dc transfer function with maximum/minimum output voltages.
 

the simulation I obtained is in the attachment. Do you know why I have more swing in the negative than in the positive ?
Both the positive and negative swings do not reach the supply voltages like most Cmos opamps.
The different amount of swing at the different polarities is caused by the design of the circuit.
Maybe the negative feedback resistor is loading down the output and the P-channel and N-channel output Mosfets are not perfectly symmetrical.
 

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