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output voltage output stage

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jalinmes

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how to set the output operating point of the output stage at half vdd?

if by the attached photo guidance in common mode condition, first stage can be folded before designing the second stage. as shown in the photo.

the guidance is trying to make the current of M7 equal to M6 to make the operating point at the output stage becomes at half vdd.

My doubt is that M6 is the current source and half vdd should be just set by

I(M6)= 1/2*β*(Vgs-Vt)^2(1+λVds) so If I is fixed, by changing the ratio of W/L of M7, Vds of M7 can be obtained to be 1/2vdd and let output voltage to be at 1/2vdd be the operational point.

what is the difference in between?
 

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