Output of exors are showing x in EDA playground

sushl · May 21, 2019

Hi all ,
I've tried a simple EXOR verilog code along with test bench on the EDA playground, test bench is forced with inputs 00,01,10,11 respectively ;

can anybody tell me why were not getting correct outputs? all are showing x,x,x,x in the LOG.

Here's the link to page
https://www.edaplayground.com/x/3QTX

thanks and regards
Sushl

FvM · May 21, 2019

Code Verilog - [expand]
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module my_XOR(output Out, input A, input B);
  wire x,y,inA,inB,not_inA,not_inB;
  and(x,inA,not_inB);
  and(y,not_inA,inB);
  not(not_inA,inA);
  not(not_inB,inB);
  or(Out,x,y);
endmodule

Do you see inA and inB being driven anywhere? I don't.

sushl · May 22, 2019

FvM said:

Code Verilog - [expand]
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module my_XOR(output Out, input A, input B);
  wire x,y,inA,inB,not_inA,not_inB;
  and(x,inA,not_inB);
  and(y,not_inA,inB);
  not(not_inA,inA);
  not(not_inB,inB);
  or(Out,x,y);
endmodule

Do you see inA and inB being driven anywhere? I don't.

Thanks FVM. I have mistakenly considered the input's inA and inB as wire's ; i have rectified them it works now.

Output of exors are showing x in EDA playground

sushl

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FvM

Super Moderator

sushl

sushl

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Code Verilog - [expand]
1 2 3 4 5 6 7 8	module my_XOR(output Out, input A, input B); wire x,y,inA,inB,not_inA,not_inB; and(x,inA,not_inB); and(y,not_inA,inB); not(not_inA,inA); not(not_inB,inB); or(Out,x,y); endmodule

Output of exors are showing x in EDA playground

sushl

Junior Member level 2

FvM

Super Moderator

sushl

Junior Member level 2

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