operation of integrator amplifier

[dinosaur078]

dear every body
can you explain to me in this example, why the right plate voltage of C1 to fall linearly with time while its left plate is pinned at zero ?
many thanks in advance

 

[goldsmith]

Dear dinosaur078
Hi
At first consider that you have a resistor instead of that capacitor , what will happen ? 180 degree phase shift. right ? i think you can understand my meaning .
Best Wishes
Goldsmith

 

[dinosaur078]

dear goldsmith
i understand what y mean, but i am not clear that how does the electrons flow through R1 and C1 at the beginning to the end of period time : Tb ?

 

[goldsmith]

Ha ha ! i know what is your mean , hence i wrote this literature for you . see it , please :

But of course we will have a minus beside the 1/RC that i forgot to write .

 

[dinosaur078]

hi hi , thank you , by the way can you explain to me , how does C1 charge and discharge the electron ?
and why the right plate of C1 is "positive" and another is "negative" ?

 

[FboDigit]

You can consider that he pin - of the operational amplifier always want to be at the same voltage that the pin + in this kind of circuit. In this case 0V
Because the current in the capacitor is limited by the resistor(V/R) you say that the voltage on the right side of the capacitor will be approximately linear.
The left panel will ALWAYS pined to 0V this must be the begining of your analyse.

 

[goldsmith]

Of course i can describe it's behavior . but before that , tell me , that are you familiar with opamp circuit analysis and virtual ground ? thus i can continue .

 

[dinosaur078]

dear goldsmith
of course , i am familiar with opamp circuit analysis and virtual ground

 

[goldsmith]

So , see below, please :

Don't forget that the voltage across the capacitor is out put voltage . a first head of capacitor is connected to the virtual ground . it means that the capacitor is connected to the out put and ground . ok ?