boardlanguage
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ovm presentation
ovmworld.org has finally posted an online-version of the seminar series held earlier this year. Go see it at
**broken link removed**
OVM is a Systemverilog class-library and framework for writing re-usable, modular testbenches. To run & compile the examples, you'll need Cadence IUS62 or Mentor Questasim 6.3d. (In theory Synopsys VCS should be able to run it, too.)
The online-seminar is geared for an audience who has working knowledge of Systemverilog. You don't need to be an expert, but familiarity with OOP (objectoriented programming) concepts, andclass/endclass semantics is helpful. If you don't know systemverilog, learn that first, and come back later to OVM.
ovmworld.org has finally posted an online-version of the seminar series held earlier this year. Go see it at
**broken link removed**
OVM is a Systemverilog class-library and framework for writing re-usable, modular testbenches. To run & compile the examples, you'll need Cadence IUS62 or Mentor Questasim 6.3d. (In theory Synopsys VCS should be able to run it, too.)
The online-seminar is geared for an audience who has working knowledge of Systemverilog. You don't need to be an expert, but familiarity with OOP (objectoriented programming) concepts, andclass/endclass semantics is helpful. If you don't know systemverilog, learn that first, and come back later to OVM.