Opamps pole changes during AC simulation

[jutek]

LDO's AC performance

Hello

I met this problem during AC simulation

When i change zero's location by changing Cl or Resr, location of the opamp's pole also changes. I don't know why.

regards

 

[VVV]

Re: LDO's AC performance

I don't think the opamp's pole changes.
But the entire plot will change and this may create the impression that the pole changes, too.
Changing Cl will change the location of the Rl, CL pole, shifting the overall gain. That way it may appear that the opamp's pole has changed, although in fact it stays the same.
I would review the measurements carefully.

 

[v_c]

Re: LDO's AC performance

VVV is right -- I don't think you can change the pole of the opamp. However, by changing the load capacitance (and its associated ESR), you will change the poles in the overall loop-gain transfer function for the LDO. The most important of these is the dominant pole which is roughly at \[f_p = \frac{1}{2 \pi (R_{o,trans} + R_{esr}) C_{load}}\] where \[R_{o,trans}\] is the output resistance of the transistor, \[R_{esr}\] is the ESR of the capacitor and \[C_{load}\] is the load capacitance.

Best regards,
v_c

 

[jutek]

Re: LDO's AC performance

i know it just can't be, but it's a cause i'm writing.

I measure it by .PZ wtith at broken loop (between resitors).

for example:

Resr=1 CL=10u P1=1.67k P2=7.39k Z1=15.9k
Resr=1 CL=1u P1=4.34k P2=28.41k Z1=159k
Resr=1 CL=5u P1=2.75k P2=8.93k Z1=31.8k

Rl equals to 8

regards luke