vilemk
Newbie
Hello,
I have problem with Opamp transient simulation. I´ve designed several one stage structures (folded, telescopic, symetrical CMOS) and all made same problem. In attachment file is simulation connection - R ratio is 1. So If I have input sinus amplitude 1 V, output amplitude is not 1 V but a little bit smaller. I don´t know, where is mistake. It is only in one stage structures, two stage is ok. Could somebody help me?
I have problem with Opamp transient simulation. I´ve designed several one stage structures (folded, telescopic, symetrical CMOS) and all made same problem. In attachment file is simulation connection - R ratio is 1. So If I have input sinus amplitude 1 V, output amplitude is not 1 V but a little bit smaller. I don´t know, where is mistake. It is only in one stage structures, two stage is ok. Could somebody help me?